[PATCH i-g-t v3 2/6] lib/gpu_cmds: default to uc MOCS index

[Matthew Auld]

Currently we just default to index=0, but that can have different
meaning between HW versions. Rather just default to UC mocs index.

Signed-off-by: Matthew Auld <matthew.auld at intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>
---
 lib/gpu_cmds.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/lib/gpu_cmds.c b/lib/gpu_cmds.c
index 49ba364f9..d909efde8 100644
--- a/lib/gpu_cmds.c
+++ b/lib/gpu_cmds.c
@@ -214,10 +214,10 @@ gen9_fill_surface_state(struct intel_bb *ibb,
 	ss->ss0.vertical_alignment = 1; /* align 4 */
 	ss->ss0.horizontal_alignment = 1; /* align 4 */
 
-	if (mocs == INTEL_BUF_MOCS_UC)
-		ss->ss1.mocs_index = intel_get_uc_mocs_index(ibb->fd);
-	else if (mocs == INTEL_BUF_MOCS_WB)
+	if (mocs == INTEL_BUF_MOCS_WB)
 		ss->ss1.mocs_index = intel_get_wb_mocs_index(ibb->fd);
+	else
+		ss->ss1.mocs_index = intel_get_uc_mocs_index(ibb->fd);
 
 	if (buf->tiling == I915_TILING_X)
 		ss->ss0.tiled_mode = 2;
@@ -275,10 +275,10 @@ gen11_fill_surface_state(struct intel_bb *ibb,
 	ss->ss0.vertical_alignment = vertical_alignment; /* align 4 */
 	ss->ss0.horizontal_alignment = horizontal_alignment; /* align 4 */
 
-	if (mocs == INTEL_BUF_MOCS_UC)
-		ss->ss1.mocs_index = intel_get_uc_mocs_index(ibb->fd);
-	else if (mocs == INTEL_BUF_MOCS_WB)
+	if (mocs == INTEL_BUF_MOCS_WB)
 		ss->ss1.mocs_index = intel_get_wb_mocs_index(ibb->fd);
+	else
+		ss->ss1.mocs_index = intel_get_uc_mocs_index(ibb->fd);
 
 	if (buf->tiling == I915_TILING_X)
 		ss->ss0.tiled_mode = 2;
@@ -931,10 +931,10 @@ xehp_fill_surface_state(struct intel_bb *ibb,
 	ss->ss0.vertical_alignment = 1; /* align 4 */
 	ss->ss0.horizontal_alignment = 1; /* align 4 */
 
-	if (mocs == INTEL_BUF_MOCS_UC)
-		ss->ss1.mocs_index = intel_get_uc_mocs_index(ibb->fd);
-	else if (mocs == INTEL_BUF_MOCS_WB)
+	if (mocs == INTEL_BUF_MOCS_WB)
 		ss->ss1.mocs_index = intel_get_wb_mocs_index(ibb->fd);
+	else
+		ss->ss1.mocs_index = intel_get_uc_mocs_index(ibb->fd);
 
 	if (buf->tiling == I915_TILING_X)
 		ss->ss0.tiled_mode = 2;
-- 
2.43.2