[PATCH i-g-t v2 1/2] lib/intel_common: Add placeholder for common i915 and xe functions

[Matthew Auld]

On 14/03/2024 06:52, Zbigniew Kempczyński wrote:
> On Wed, Mar 13, 2024 at 04:32:53PM +0000, Matthew Auld wrote:
>> On 13/03/2024 10:45, Zbigniew Kempczyński wrote:
>>> Some constructs like querying if device is discrete or getting memory
>>> region origin are common so add new file to place those functions into.
>>>
>>> Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>
>>> Cc: Matthew Auld <matthew.auld at intel.com>
>>>
>>> ---
>>> v2: Add gen12 (integrated + dg1) support in querying is region
>>>       compressible (Matt)
>>>       Small code restructure.
>>> ---
>>>    lib/intel_common.c | 102 +++++++++++++++++++++++++++++++++++++++++++++
>>>    lib/intel_common.h |  25 +++++++++++
>>>    lib/meson.build    |   1 +
>>>    3 files changed, 128 insertions(+)
>>>    create mode 100644 lib/intel_common.c
>>>    create mode 100644 lib/intel_common.h
>>>
>>> diff --git a/lib/intel_common.c b/lib/intel_common.c
>>> new file mode 100644
>>> index 0000000000..4cee70c53a
>>> --- /dev/null
>>> +++ b/lib/intel_common.c
>>> @@ -0,0 +1,102 @@
>>> +// SPDX-License-Identifier: MIT
>>> +/*
>>> + * Copyright © 2024 Intel Corporation
>>> + */
>>> +
>>> +#include "drmtest.h"
>>> +#include "intel_chipset.h"
>>> +#include "intel_common.h"
>>> +#include "i915/intel_memory_region.h"
>>> +#include "xe/xe_query.h"
>>> +
>>> +/**
>>> + * is_intel_dgfx:
>>> + * @fd: drm fd
>>> + *
>>> + * Check if Intel device opened at @fd is discrete regardless driver (i915/xe).
>>> + *
>>> + * Returns: True if device is Intel discrete, false otherwise
>>> + */
>>> +bool is_intel_dgfx(int fd)
>>> +{
>>> +	return get_intel_driver(fd) == INTEL_DRIVER_XE ? xe_has_vram(fd) :
>>> +							 gem_has_lmem(fd);
>>> +}
>>> +
>>> +/**
>>> + * is_intel_system_region:
>>> + * @fd: drm fd
>>> + * @region: region id
>>> + *
>>> + * Check if @region is system region on @fd opened Intel device.
>>> + *
>>> + * Returns: True if @region is system memory, false otherwise
>>> + */
>>> +bool is_intel_system_region(int fd, uint64_t region)
>>> +{
>>> +	enum intel_driver driver = get_intel_driver(fd);
>>> +	bool is_system;
>>> +
>>> +	if (driver == INTEL_DRIVER_I915) {
>>> +		is_system = IS_SYSTEM_MEMORY_REGION(region);
>>> +	} else {
>>> +		igt_assert_neq(region, 0);
>>> +		is_system = (region == system_memory(fd));
>>> +	}
>>> +
>>> +	return is_system;
>>> +}
>>> +
>>> +/**
>>> + * is_intel_vram_region:
>>> + * @fd: drm fd
>>> + * @region: region id
>>> + *
>>> + * Check if @region is vram (device memory) region on @fd opened Intel device.
>>> + *
>>> + * Returns: True if @region is vram, false otherwise
>>> + */
>>> +bool is_intel_vram_region(int fd, uint64_t region)
>>> +{
>>> +	enum intel_driver driver = get_intel_driver(fd);
>>> +	bool is_vram;
>>> +
>>> +	if (driver == INTEL_DRIVER_I915) {
>>> +		is_vram = IS_DEVICE_MEMORY_REGION(region);
>>> +	} else {
>>> +		igt_assert_neq(region, 0);
>>> +		is_vram = (region & (all_memory_regions(fd) & (~system_memory(fd))));
>>> +	}
>>> +
>>> +	return is_vram;
>>> +}
>>> +
>>> +/**
>>> + * is_intel_region_compressible:
>>> + * @fd: drm fd
>>> + * @region: region id
>>> + *
>>> + * Check if @region is compressible on @fd opened Intel device.
>>> + *
>>> + * Returns: True if @region is compressible, false otherwise
>>> + */
>>> +bool is_intel_region_compressible(int fd, uint64_t region)
>>> +{
>>> +	uint32_t devid = intel_get_drm_devid(fd);
>>> +	bool is_dgfx = is_intel_dgfx(fd);
>>> +	bool has_flatccs = HAS_FLATCCS(devid);
>>> +
>>> +	/* Integrated or DG1 with aux-ccs */
>>> +	if (IS_GEN12(devid) && !has_flatccs)
>>> +		return true;
>>> +
>>> +	/* Integrated Xe2+ supports compression on system memory */
>>> +	if (AT_LEAST_GEN(devid, 20) && !is_dgfx && is_intel_system_region(fd, region))
>>> +		return true;
>>> +
>>> +	/* Discrete supports compression on vram */
>>> +	if (is_dgfx && is_intel_vram_region(fd, region))
>>> +		return true;
>>> +
>>> +	return false;
>>
>> So does pre-gen12 not support aux-ccs ?
> 
> IIRC aux-ccs occured on gen12. I didn't find much information about
> compression on pre-gen12 and I don't see any code in IGT which is
> related to compression on pre-gen12. If I'm wrong we may alter
> this condition later (when appropriate code client will need to
> use it).

For the series,
Reviewed-by: Matthew Auld <matthew.auld at intel.com>


> 
> --
> Zbigniew
> 
>>
>>> +}
>>> diff --git a/lib/intel_common.h b/lib/intel_common.h
>>> new file mode 100644
>>> index 0000000000..924802473b
>>> --- /dev/null
>>> +++ b/lib/intel_common.h
>>> @@ -0,0 +1,25 @@
>>> +/* SPDX-License-Identifier: MIT */
>>> +/*
>>> + * Copyright © 2024 Intel Corporation
>>> + */
>>> +
>>> +#ifndef __INTEL_COMMON_H__
>>> +#define __INTEL_COMMON_H__
>>> +
>>> +/**
>>> + * SECTION:intel_common
>>> + * @short_description: i915/xe common library code
>>> + * @title: Intel library
>>> + * @include: intel_common.h
>>> + *
>>> + */
>>> +
>>> +#include <stdbool.h>
>>> +#include <stdint.h>
>>> +
>>> +bool is_intel_dgfx(int fd);
>>> +bool is_intel_system_region(int fd, uint64_t region);
>>> +bool is_intel_vram_region(int fd, uint64_t region);
>>> +bool is_intel_region_compressible(int fd, uint64_t region);
>>> +
>>> +#endif
>>> diff --git a/lib/meson.build b/lib/meson.build
>>> index 6122861d8b..934bac5c67 100644
>>> --- a/lib/meson.build
>>> +++ b/lib/meson.build
>>> @@ -59,6 +59,7 @@ lib_sources = [
>>>    	'intel_bufops.c',
>>>    	'intel_chipset.c',
>>>    	'intel_cmds_info.c',
>>> +	'intel_common.c',
>>>    	'intel_compute.c',
>>>    	'intel_compute_square_kernels.c',
>>>    	'intel_ctx.c',