[PATCH] Fix WB caching PAT index for coherency mode
Kamil Konieczny
kamil.konieczny at linux.intel.com
Mon Mar 25 15:58:42 UTC 2024
Hi Jagmeet,
On 2024-03-22 at 16:09:06 -0700, Jagmeet Randhawa wrote:
One nit about subject:
[PATCH] Fix WB caching PAT index for coherency mode
this should start with test name you want to fix and have "i-g-t"
after PATCH, so:
[PATCH i-g-t] tests/intel/xe_vm: Fix WB caching PAT index for coherency mode
> By default "coh_mode" is "XE_COH_NONE" and
> "cpu_caching" is set to "DRM_XE_GEM_CPU_CACHING_WB"
> because write back (WB) caching requires
> a valid coherence mode, and "coh_mode" is set to
> "XE_COH_NONE" there is no coherence leading to this
> contradiction. So to address this issue, we set the
> pat_index with intel_get_pat_idx_wb(fd);
-----------------------------------------^
End sentence with dot.
Also please simplify your description, it looks like you
repeat yourself.
You missed Cc and your signed off by, so here write:
Cc: Oak Zeng <oak.zeng at intel.com>
Signed-off-by: Jagmeet Randhawa <jagmeet.randhawa at intel.com>
Regards,
Kamil
> ---
> tests/intel/xe_vm.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/tests/intel/xe_vm.c b/tests/intel/xe_vm.c
> index 7c061c497..1f458174d 100644
> --- a/tests/intel/xe_vm.c
> +++ b/tests/intel/xe_vm.c
> @@ -1789,6 +1789,7 @@ static void bind_flag_invalid(int fd)
> bind.bind.range = bo_size;
> bind.bind.addr = addr;
> bind.bind.op = DRM_XE_VM_BIND_OP_MAP;
> + bind.bind.pat_index = intel_get_pat_idx_wb(fd);
> bind.num_syncs = 1;
> bind.syncs = (uintptr_t)sync;
>
> --
> 2.25.1
>
More information about the igt-dev
mailing list