[PATCH i-g-t] tests/intel/xe_vm: Fix WB caching PAT index for coherency mode

[Jagmeet Randhawa]

Addressing Oaks comments: So the reason I mentioned COH_MODE
is because for the test failure, we go into the folllowing
if statement and throw an error:

 "if (XE_IOCTL_DBG(xe, coh_mode == XE_COH_NONE &&
     bos[i]->cpu_caching == DRM_XE_GEM_CPU_CACHING_WB)){ 
     err = -EINVAL;
     goto put_obj; }"

We got the failure because
coh_mode = XE_COH_NONE and we wanted to do a DRM_XE_GEM_CPU_CACHING_WB
but in order to do writeback we need atleast 1 way coherency.
COH_MODE is probably set by default to NONE. Which is why we use
"bind.bind.pat_index = intel_get_pat_idx_wb(fd);" to get the correct
COH_MODE which then allowed the test to pass correctly.

Addressing Kamils comments: I have updated the subject
and simplified the description.

Jagmeet Randhawa (1):
  Fix WB caching PAT index for coherency mode

 tests/intel/xe_vm.c | 1 +
 1 file changed, 1 insertion(+)

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2.25.1