[PATCH i-g-t 2/3] tests/intel/xe_pm: Validate vm-bind prefetch flag with suspend and resume

Rodrigo Vivi rodrigo.vivi at intel.com
Thu Mar 28 18:05:32 UTC 2024


On Tue, Mar 26, 2024 at 01:40:44AM +0530, sai.gowtham.ch at intel.com wrote:
> From: Sai Gowtham Ch <sai.gowtham.ch at intel.com>
> 
> Test functionality of vm_bind prefetch with S&R
> 
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch at intel.com>
> ---
>  tests/intel/xe_pm.c | 20 +++++++++++++++++---
>  1 file changed, 17 insertions(+), 3 deletions(-)
> 
> diff --git a/tests/intel/xe_pm.c b/tests/intel/xe_pm.c
> index 8659e87cc..e016f2bca 100644
> --- a/tests/intel/xe_pm.c
> +++ b/tests/intel/xe_pm.c
> @@ -34,6 +34,7 @@
>  #define MAGIC_2 0xdeadbeef
>  
>  #define USERPTR         (0x1 << 0)
> +#define PREFETCH        (0x1 << 5)

why 0x5? we don't need to copy verbatim this from other tests.
0x2 makes more sense here.

>  
>  typedef struct {
>  	int fd_xe;
> @@ -289,6 +290,7 @@ static void close_fw_handle(int sig)
>   * arg[2]:
>   *
>   * @usrptr:     usrptr
> + * @prefetch:  prefetch
>   */
>  static void
>  test_exec(device_t device, struct drm_xe_engine_class_instance *eci,
> @@ -340,9 +342,16 @@ test_exec(device_t device, struct drm_xe_engine_class_instance *eci,
>  	if (flags & USERPTR) {
>  		data = aligned_alloc(xe_get_default_alignment(device.fd_xe), bo_size);
>  	} else {
> -		bo = xe_bo_create(device.fd_xe, vm, bo_size,
> -				  vram_if_possible(device.fd_xe, eci->gt_id),
> -				  DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> +
> +		if (flags & PREFETCH)
> +			bo = xe_bo_create(device.fd_xe, 0, bo_size,
> +					  all_memory_regions(device.fd_xe) |
> +					  vram_if_possible(device.fd_xe, 0),
> +					  DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> +		else
> +			bo = xe_bo_create(device.fd_xe, vm, bo_size,
> +					  vram_if_possible(device.fd_xe, eci->gt_id),
> +					  DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);

why? I don't see this in other tests with 'prefetch'?

>  		data = xe_bo_map(device.fd_xe, bo, bo_size);
>  	}
>  	memset(data, 0, bo_size);
> @@ -362,6 +371,10 @@ test_exec(device_t device, struct drm_xe_engine_class_instance *eci,
>  		xe_vm_bind_userptr_async(device.fd_xe, vm, bind_exec_queues[0],
>  					 to_user_pointer(data), addr, bo_size, sync, 1);
>  
> +	if (flags & PREFETCH)
> +		xe_vm_prefetch_async(device.fd_xe, vm, bind_exec_queues[0], 0, addr,
> +				     bo_size, sync, 1, 0);
> +
>  	if (check_rpm && runtime_usage_available(device.pci_xe))
>  		igt_assert(igt_pm_get_runtime_usage(device.pci_xe) > rpm_usage);
>  
> @@ -615,6 +628,7 @@ igt_main
>  		unsigned int flags;
>  	} vm_op[] = {
>  		{ "usrptr", USERPTR },
> +		{ "prefetch", PREFETCH },
>  		{ NULL },
>  	};
>  
> -- 
> 2.39.1
> 


More information about the igt-dev mailing list