[PATCH i-g-t v3 04/10] tests/intel/xe_svm: add random access test for SVM

[Zeng, Oak]

> -----Original Message-----
> From: Bommu, Krishnaiah <krishnaiah.bommu at intel.com>
> Sent: Friday, May 17, 2024 7:47 AM
> To: igt-dev at lists.freedesktop.org
> Cc: Bommu, Krishnaiah <krishnaiah.bommu at intel.com>; Zeng, Oak
> <oak.zeng at intel.com>; Ghimiray, Himal Prasad
> <himal.prasad.ghimiray at intel.com>
> Subject: [PATCH i-g-t v3 04/10] tests/intel/xe_svm: add random access test for
> SVM
> 
> Verifies the Shared Virtual Memory (SVM) functionality by randomly
> accessing any location in malloc'ed memory. The test ensures that
> the GPU can correctly handle random memory access patterns.
> 
> Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu at intel.com>
> Cc: Oak Zeng <oak.zeng at intel.com>
> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray at intel.com>
> ---
>  tests/intel/xe_svm.c | 41 +++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 41 insertions(+)
> 
> diff --git a/tests/intel/xe_svm.c b/tests/intel/xe_svm.c
> index 741961529..73a232c47 100644
> --- a/tests/intel/xe_svm.c
> +++ b/tests/intel/xe_svm.c
> @@ -27,6 +27,9 @@
>   *
>   * SUBTEST: svm-basic-mmap
>   * Description: Verify SVM basic functionality using mmap.
> + *
> + * SUBTEST: svm-random-access
> + * Description: Verifies that the GPU can randomly access and correctly store
> values in malloc'ed memory.
>   */
> 
>  #include <fcntl.h>
> @@ -119,6 +122,40 @@ static void svm_basic(int fd, uint32_t vm, struct
> drm_xe_engine_class_instance *
>  		free(dst);
>  }
> 
> +/**
> + *  @brief Verifies GPU can randomly access any location in malloc'ed memory.
> + *
> + *This function tests the ability of the GPU to randomly access and correctly
> store
> + * values in malloc'ed memory.
> + */
> +static void svm_random_access(int fd, uint32_t vm, struct
> drm_xe_engine_class_instance *eci)
> +{
> +	uint64_t gpu_va = 0x1a0000;
> +	size_t bo_size = xe_bb_size(fd, PAGE_ALIGN_UFENCE);
> +	uint32_t *dst, *dst_to_access;
> +	uint32_t size = 1024*1024, sz_dw = size/4;
> +
> +	struct xe_buffer cmd_buf = {
> +		.fd = fd,
> +		.gpu_addr = (void *)(uintptr_t)gpu_va,

Why you need uintptr_t? same to last patch

Oak
> +		.vm = vm,
> +		.size = bo_size,
> +		.placement = vram_if_possible(fd, eci->gt_id),
> +		.flag = DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM,
> +	};
> +
> +	dst = malloc(size);
> +	dst_to_access = dst + random()%sz_dw;
> +
> +	xe_create_cmdbuf(&cmd_buf, insert_store, (uint64_t)dst_to_access,
> 0xc0ffee, eci);
> +	xe_submit_cmd(&cmd_buf);
> +
> +	igt_assert_eq(*dst, 0xc0ffee);
> +
> +	xe_destroy_cmdbuf(&cmd_buf);
> +	free(dst);
> +}
> +
>  igt_main
>  {
>  	int fd;
> @@ -143,6 +180,10 @@ igt_main
>  		xe_for_each_engine(fd, hwe)
>  			svm_basic(fd, vm, hwe, true);
> 
> +	igt_subtest_f("svm-random-access")
> +		xe_for_each_engine(fd, hwe)
> +			svm_random_access(fd, vm, hwe);
> +
>  	igt_fixture {
>  		xe_vm_destroy(fd, vm);
>  		drm_close_driver(fd);
> --
> 2.25.1