[PATCH i-g-t v3 07/10] tests/intel/xe_svm: Add svm-invalid-va test to verify SVM functionality with invalid address access
Zeng, Oak
oak.zeng at intel.com
Sat May 18 02:19:27 UTC 2024
> -----Original Message-----
> From: Bommu, Krishnaiah <krishnaiah.bommu at intel.com>
> Sent: Friday, May 17, 2024 7:47 AM
> To: igt-dev at lists.freedesktop.org
> Cc: Bommu, Krishnaiah <krishnaiah.bommu at intel.com>; Zeng, Oak
> <oak.zeng at intel.com>; Ghimiray, Himal Prasad
> <himal.prasad.ghimiray at intel.com>
> Subject: [PATCH i-g-t v3 07/10] tests/intel/xe_svm: Add svm-invalid-va test to
> verify SVM functionality with invalid address access
>
> svm-invalid-va test ensures that the driver correctly handles catastrophic
> errors when the GPU attempts to access an invalid address in SVM.
>
> Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu at intel.com>
> Cc: Oak Zeng <oak.zeng at intel.com>
> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray at intel.com>
> ---
> tests/intel/xe_svm.c | 36 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 36 insertions(+)
>
> diff --git a/tests/intel/xe_svm.c b/tests/intel/xe_svm.c
> index f9e8eb2d9..895cf26ac 100644
> --- a/tests/intel/xe_svm.c
> +++ b/tests/intel/xe_svm.c
> @@ -36,6 +36,9 @@
> *
> * SUBTEST: svm-atomic-access
> * Description: verify SVM basic functionality by using GPU atomic access any
> location in malloc'ed memory
> + *
> + * SUBTEST: svm-invalid-va
> + * Description: Verify SVM functionality while accessing an invalid address.
> */
>
> #include <fcntl.h>
> @@ -269,6 +272,35 @@ static void svm_atomic_access(int fd, uint32_t vm,
> struct drm_xe_engine_class_in
> free(dst);
> }
>
> +/**
> + * Submit a GPU command to access an invalid address.
> + * Driver should detect a catastrophic error.
> + */
> +static void svm_invalid_va(int fd, uint32_t vm, struct
> drm_xe_engine_class_instance *eci)
> +{
> + uint64_t gpu_va = 0x1a0000;
> + size_t bo_size = xe_bb_size(fd, PAGE_ALIGN_UFENCE);
> + uint32_t *dst;
> +
> + struct xe_buffer cmd_buf = {
> + .fd = fd,
> + .gpu_addr = (void *)(uintptr_t)gpu_va,
> + .vm = vm,
> + .size = bo_size,
> + .placement = vram_if_possible(fd, eci->gt_id),
> + .flag =
> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM
> + };
> +
> + dst = (uint32_t *)0x1fffffffffff000;
> +
> + xe_create_cmdbuf(&cmd_buf, insert_store, (uint64_t)dst, 0xc0ffee, eci);
> +
> + igt_assert_eq(__xe_submit_cmd(&cmd_buf), -EIO); // for invalid
> address __xe_wait_ufence will return -EIO
Move the comment above igt_assert_eq. with that, patch is:
Reviewed-by: Oak Zeng <oak.zeng at intel.com>
> +
> + xe_destroy_cmdbuf(&cmd_buf);
> + free(dst);
> +}
> +
> igt_main
> {
> int fd;
> @@ -305,6 +337,10 @@ igt_main
> xe_for_each_engine(fd, hwe)
> svm_atomic_access(fd, vm, hwe);
>
> + igt_subtest_f("svm-invalid-va")
> + xe_for_each_engine(fd, hwe)
> + svm_invalid_va(fd, vm, hwe);
> +
> igt_fixture {
> xe_vm_destroy(fd, vm);
> drm_close_driver(fd);
> --
> 2.25.1
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