[PATCH i-g-t,v2 1/2] drm-uapi/xe: Expose the L3 bank mask

[Dixit, Ashutosh]

On Fri, 03 May 2024 10:12:29 -0700, Francois Dugast wrote:
>
> Align with kernel commit:
> ca83f9d20171 ("drm/xe/uapi: Expose the L3 bank mask").

Reviewed-by: Ashutosh Dixit <ashutosh.dixit at intel.com>

> Signed-off-by: Francois Dugast <francois.dugast at intel.com>
> ---
>  include/drm-uapi/xe_drm.h | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
> index 0b709b374..1100dfe1f 100644
> --- a/include/drm-uapi/xe_drm.h
> +++ b/include/drm-uapi/xe_drm.h
> @@ -508,6 +508,7 @@ struct drm_xe_query_gt_list {
>   *    containing the following in mask:
>   *    ``DSS_COMPUTE    ff ff ff ff 00 00 00 00``
>   *    means 32 DSS are available for compute.
> + *  - %DRM_XE_TOPO_L3_BANK - To query the mask of enabled L3 banks
>   *  - %DRM_XE_TOPO_EU_PER_DSS - To query the mask of Execution Units (EU)
>   *    available per Dual Sub Slices (DSS). For example a query response
>   *    containing the following in mask:
> @@ -520,6 +521,7 @@ struct drm_xe_query_topology_mask {
>
>  #define DRM_XE_TOPO_DSS_GEOMETRY	1
>  #define DRM_XE_TOPO_DSS_COMPUTE		2
> +#define DRM_XE_TOPO_L3_BANK		3
>  #define DRM_XE_TOPO_EU_PER_DSS		4
>	/** @type: type of mask */
>	__u16 type;
> --
> 2.43.0
>