[PATCH i-g-t v4 1/1] tests/intel/xe_exec_capture: Add xe_exec_capture test
Teres Alexis, Alan Previn
alan.previn.teres.alexis at intel.com
Wed Nov 13 23:26:28 UTC 2024
alan:snip
> +static void
> +test_legacy_mode(int fd, struct drm_xe_engine_class_instance *eci,
> + int n_exec_queues, int n_execs, unsigned int flags)
alan: One more thing, based on the testing flow from the caller, we can refactor a lot of code to not use loops
and not arrays of more than 1 execution queue and number of batches. This also includes
the local variables instanced as arrays in support of the same.
> +{
> + uint32_t vm;
> + const uint64_t addr = BASE_ADDRESS;
> + struct drm_xe_sync sync[2] = {
> + { .type = DRM_XE_SYNC_TYPE_SYNCOBJ, .flags = DRM_XE_SYNC_FLAG_SIGNAL, },
> + { .type = DRM_XE_SYNC_TYPE_SYNCOBJ, .flags = DRM_XE_SYNC_FLAG_SIGNAL, },
> + };
> + struct drm_xe_exec exec = {
> + .num_batch_buffer = 1,
> + .num_syncs = 2,
> + .syncs = to_user_pointer(sync),
> + };
> + uint32_t exec_queues[MAX_N_EXECQUEUES];
> + uint32_t syncobjs[MAX_N_EXECQUEUES];
> + size_t bo_size;
> + uint32_t bo = 0;
> + struct {
> + struct xe_spin spin;
> + uint32_t batch[BATCH_DW_COUNT];
> + uint64_t pad;
> + uint32_t data;
> + } *data;
> + struct xe_spin_opts spin_opts = { .preempt = false };
> + int i, b;
> +
> + igt_assert(n_exec_queues <= MAX_N_EXECQUEUES);
> +
> + vm = xe_vm_create(fd, 0, 0);
> + bo_size = sizeof(*data) * n_execs;
> + bo_size = xe_bb_size(fd, bo_size);
> +
> + bo = xe_bo_create(fd, vm, bo_size,
> + vram_if_possible(fd, eci->gt_id),
> + DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> + data = xe_bo_map(fd, bo, bo_size);
> +
> + for (i = 0; i < n_exec_queues; i++) {
> + exec_queues[i] = xe_exec_queue_create(fd, vm, eci, 0);
> + syncobjs[i] = syncobj_create(fd, 0);
> + };
> +
alan:snip
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