[PATCH i-g-t] tests/intel/kms_pm_dc: Add DC5 retention flops test

Luca Coelho luca at coelho.fi
Wed Oct 9 10:22:26 UTC 2024


On Mon, 2023-03-27 at 23:42 +0530, Mohammed Thasleem wrote:
> This test validates the display engine entry to DC5 state while
> eDP PSR is active on Pipe B from display version 30 onwards.
> 
> Signed-off-by: Mohammed Thasleem <mohammed.thasleem at intel.com>
> ---

Reviewed-by: Luca Coelho <luciano.coelho at intel.com>

--
Cheers,
Luca.



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