[PATCH i-g-t 1/2] lib/amdgpu: add sdma ring id paramter for deadlock helper
Jesse.zhang@amd.com
jesse.zhang at amd.com
Thu Oct 10 04:58:09 UTC 2024
Since sdma may have multiple rings on different chip,
deadlock testing should cover all sdma ring tests.
Signed-off-by: Jesse Zhang <Jesse.Zhang at amd.com>
---
lib/amdgpu/amd_deadlock_helpers.c | 43 +++++++++++++++++++++++++++----
lib/amdgpu/amd_deadlock_helpers.h | 5 ++--
2 files changed, 40 insertions(+), 8 deletions(-)
diff --git a/lib/amdgpu/amd_deadlock_helpers.c b/lib/amdgpu/amd_deadlock_helpers.c
index c71272e58..39641ce23 100644
--- a/lib/amdgpu/amd_deadlock_helpers.c
+++ b/lib/amdgpu/amd_deadlock_helpers.c
@@ -169,8 +169,8 @@ amdgpu_wait_memory_helper(amdgpu_device_handle device_handle, unsigned int ip_ty
free_cmd_base(base_cmd);
}
-void
-bad_access_helper(amdgpu_device_handle device_handle, unsigned int cmd_error, unsigned int ip_type)
+static void
+bad_access_helper(amdgpu_device_handle device_handle, unsigned int cmd_error, unsigned int ip_type, unsigned int ring_id)
{
const struct amdgpu_ip_block_version *ip_block = NULL;
@@ -190,7 +190,7 @@ bad_access_helper(amdgpu_device_handle device_handle, unsigned int cmd_error, un
ring_context->pm4 = calloc(pm4_dw, sizeof(*ring_context->pm4));
ring_context->pm4_size = pm4_dw;
ring_context->res_cnt = 1;
- ring_context->ring_id = 0;
+ ring_context->ring_id = ring_id;
igt_assert(ring_context->pm4);
ip_block = get_ip_block(device_handle, ip_type);
r = amdgpu_bo_alloc_and_map(device_handle,
@@ -216,11 +216,27 @@ bad_access_helper(amdgpu_device_handle device_handle, unsigned int cmd_error, un
free(ring_context);
}
+void bad_access_ring_helper(amdgpu_device_handle device_handle, unsigned int cmd_error, unsigned int ip_type)
+{
+ int r;
+ struct drm_amdgpu_info_hw_ip info;
+ uint32_t ring_id;
+
+ r = amdgpu_query_hw_ip_info(device_handle, ip_type, 0, &info);
+ igt_assert_eq(r, 0);
+ if (!info.available_rings)
+ igt_info("SKIP ... as there's no ring for ip %d\n", ip_type);
+
+ for (ring_id = 0; (1 << ring_id) & info.available_rings; ring_id++) {
+ bad_access_helper(device_handle, cmd_error, ip_type, ring_id);
+ }
+}
+
#define MAX_DMABUF_COUNT 0x20000
#define MAX_DWORD_COUNT 256
-void
-amdgpu_hang_sdma_helper(amdgpu_device_handle device_handle, uint8_t hang_type)
+static void
+amdgpu_hang_sdma_helper(amdgpu_device_handle device_handle, uint8_t hang_type, unsigned int ring_id)
{
int j, r;
uint32_t *ptr, offset;
@@ -240,6 +256,7 @@ amdgpu_hang_sdma_helper(amdgpu_device_handle device_handle, uint8_t hang_type)
}
ring_context->secure = false;
ring_context->res_cnt = 2;
+ ring_context->ring_id = ring_id;
igt_assert(ring_context->pm4);
r = amdgpu_cs_ctx_create(device_handle, &ring_context->context_handle);
@@ -309,3 +326,19 @@ amdgpu_hang_sdma_helper(amdgpu_device_handle device_handle, uint8_t hang_type)
igt_assert_eq(r, 0);
free_cmd_base(base_cmd);
}
+
+void amdgpu_hang_sdma_ring_helper(amdgpu_device_handle device_handle, uint8_t hang_type)
+{
+ int r;
+ struct drm_amdgpu_info_hw_ip info;
+ uint32_t ring_id;
+
+ r = amdgpu_query_hw_ip_info(device_handle, AMDGPU_HW_IP_DMA, 0, &info);
+ igt_assert_eq(r, 0);
+ if (!info.available_rings)
+ igt_info("SKIP ... as there's no ring for the sdma\n");
+
+ for (ring_id = 0; (1 << ring_id) & info.available_rings; ring_id++)
+ amdgpu_hang_sdma_helper(device_handle, hang_type, ring_id);
+}
+
diff --git a/lib/amdgpu/amd_deadlock_helpers.h b/lib/amdgpu/amd_deadlock_helpers.h
index 165ffb98d..7f8419280 100644
--- a/lib/amdgpu/amd_deadlock_helpers.h
+++ b/lib/amdgpu/amd_deadlock_helpers.h
@@ -26,11 +26,10 @@
void
amdgpu_wait_memory_helper(amdgpu_device_handle device_handle, unsigned int ip_type);
-
void
-bad_access_helper(amdgpu_device_handle device_handle, unsigned int cmd_error, unsigned int ip_type);
+bad_access_ring_helper(amdgpu_device_handle device_handle, unsigned int cmd_error, unsigned int ip_type);
void
-amdgpu_hang_sdma_helper(amdgpu_device_handle device_handle, uint8_t hang_type);
+amdgpu_hang_sdma_ring_helper(amdgpu_device_handle device_handle, uint8_t hang_type);
#endif
--
2.25.1
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