[PATCH i-g-t 11/14] lib/rendercopy: Use igt_require() to validate gen2/3 surface size

Kamil Konieczny kamil.konieczny at linux.intel.com
Tue Oct 22 16:21:25 UTC 2024


Hi Ville,
On 2024-10-04 at 13:41:18 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> gen2/3 render engine has a max surface size 2kx2k. That is
> pretty easy to hit accidentally. Rather than exploding with
> an assert it seems better to just gracefully skip the test.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Reviewed-by: Kamil Konieczny <kamil.konieczny at linux.intel.com>

> ---
>  lib/rendercopy_i830.c | 8 ++++----
>  lib/rendercopy_i915.c | 8 ++++----
>  2 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/lib/rendercopy_i830.c b/lib/rendercopy_i830.c
> index 4b0ea3b859e2..ced4a84a23e8 100644
> --- a/lib/rendercopy_i830.c
> +++ b/lib/rendercopy_i830.c
> @@ -139,8 +139,8 @@ static void gen2_emit_target(struct intel_bb *ibb,
>  	uint32_t format;
>  
>  	igt_assert_lte(dst->surface[0].stride, 8192);
> -	igt_assert_lte(intel_buf_width(dst), 2048);
> -	igt_assert_lte(intel_buf_height(dst), 2048);
> +	igt_require(intel_buf_width(dst) <= 2048);
> +	igt_require(intel_buf_height(dst) <= 2048);
>  
>  	switch (dst->bpp) {
>  		case 8: format = COLR_BUF_8BIT; break;
> @@ -184,8 +184,8 @@ static void gen2_emit_texture(struct intel_bb *ibb,
>  	uint32_t format;
>  
>  	igt_assert_lte(src->surface[0].stride, 8192);
> -	igt_assert_lte(intel_buf_width(src), 2048);
> -	igt_assert_lte(intel_buf_height(src), 2048);
> +	igt_require(intel_buf_width(src) <= 2048);
> +	igt_require(intel_buf_height(src) <= 2048);
>  
>  	switch (src->bpp) {
>  		case 8: format = MAPSURF_8BIT | MT_8BIT_L8; break;
> diff --git a/lib/rendercopy_i915.c b/lib/rendercopy_i915.c
> index 94cdfb99af9a..2095a7c14b26 100644
> --- a/lib/rendercopy_i915.c
> +++ b/lib/rendercopy_i915.c
> @@ -93,8 +93,8 @@ void gen3_render_copyfunc(struct intel_bb *ibb,
>  		uint32_t format_bits, tiling_bits = 0;
>  
>  		igt_assert_lte(src->surface[0].stride, 8192);
> -		igt_assert_lte(intel_buf_width(src), 2048);
> -		igt_assert_lte(intel_buf_height(src), 2048);
> +		igt_require(intel_buf_width(src) <= 2048);
> +		igt_require(intel_buf_height(src) <= 2048);
>  
>  		if (src->tiling != I915_TILING_NONE)
>  			tiling_bits = MS3_TILED_SURFACE;
> @@ -136,8 +136,8 @@ void gen3_render_copyfunc(struct intel_bb *ibb,
>  		uint32_t format_bits;
>  
>  		igt_assert_lte(dst->surface[0].stride, 8192);
> -		igt_assert_lte(intel_buf_width(dst), 2048);
> -		igt_assert_lte(intel_buf_height(dst), 2048);
> +		igt_require(intel_buf_width(dst) <= 2048);
> +		igt_require(intel_buf_height(dst) <= 2048);
>  
>  		switch (dst->bpp) {
>  			case 8: format_bits = COLR_BUF_8BIT; break;
> -- 
> 2.45.2
> 


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