[PATCH i-g-t V2 2/2] tests/intel: Add xe_pci_membarrier test

Tejas Upadhyay tejas.upadhyay at intel.com
Wed Oct 23 09:43:27 UTC 2024


We want to make sure that direct mmap mapping of physical
page at doorbell space and whole page is accessible in order
to use pci memory barrier effect effectively.

This is basic pci memory barrier test to showcase xe driver
support for feature. In follow up patches we will have more
of corner and negative tests added later.

Signed-off-by: Tejas Upadhyay <tejas.upadhyay at intel.com>
---
 tests/intel/xe_pci_membarrier.c | 80 +++++++++++++++++++++++++++++++++
 tests/meson.build               |  1 +
 2 files changed, 81 insertions(+)
 create mode 100644 tests/intel/xe_pci_membarrier.c

diff --git a/tests/intel/xe_pci_membarrier.c b/tests/intel/xe_pci_membarrier.c
new file mode 100644
index 000000000..d0bf447b6
--- /dev/null
+++ b/tests/intel/xe_pci_membarrier.c
@@ -0,0 +1,80 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright(c) 2024 Intel Corporation. All rights reserved.
+ */
+
+#include "xe_drm.h"
+#include "igt.h"
+
+/**
+ * TEST: Test if the driver is capable of putting pci memory barrier using mmap
+ * Category: Core
+ * Mega feature: General Core features
+ * Sub-category: Memory management tests
+ * Functionality: mmap with pre-defined offset
+ */
+
+IGT_TEST_DESCRIPTION("Basic MMAP tests pci memory barrier effect with special offset");
+#define PAGE_SHIFT 12
+#define PAGE_SIZE 4096
+
+/**
+ * SUBTEST: basic
+ * Description: create pci memory barrier with write on defined mmap offset.
+ * Test category: functionality test
+ *
+ */
+
+static void pci_membarrier(int xe)
+{
+	uint64_t flags = MAP_SHARED;
+	unsigned int prot = PROT_WRITE;
+	uint32_t *ptr;
+	uint64_t size = PAGE_SIZE;
+	struct timespec tv;
+        struct drm_xe_gem_mmap_offset mmo = {
+                .handle = 0,
+                .flags = DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER,
+        };
+
+        igt_assert_eq(igt_ioctl(xe, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo), 0);
+        ptr = mmap(NULL, size, prot, flags, xe, mmo.offset);
+	igt_assert(ptr != MAP_FAILED);
+
+	/* Check whole page for any errors, also check as
+	 * we should not read written values back
+	 */
+	for (int i = 0; i < size / sizeof(*ptr); i++) {
+		/* It is expected unconfigured doorbell space
+		 * will return read value 0xdeadbeef
+		 */
+		igt_assert_eq_u32(READ_ONCE(ptr[i]), 0xdeadbeef);
+
+		igt_gettime(&tv);
+		ptr[i] = i;
+		if (READ_ONCE(ptr[i]) == i) {
+			while (READ_ONCE(ptr[i]) == i)
+				;
+			igt_info("fd:%d value retained for %"PRId64"ns pos:%d\n",
+				 xe, igt_nsec_elapsed(&tv), i);
+		}
+		igt_assert_neq(READ_ONCE(ptr[i]), i);
+	}
+
+	munmap(ptr, size);
+}
+
+igt_main
+{
+	int xe;
+
+	igt_fixture {
+		xe = drm_open_driver(DRIVER_XE);
+	}
+
+	igt_subtest_f("basic")
+		pci_membarrier(xe);
+
+	igt_fixture
+		drm_close_driver(xe);
+}
diff --git a/tests/meson.build b/tests/meson.build
index 34b87b125..15131d812 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -306,6 +306,7 @@ intel_xe_progs = [
 	'xe_noexec_ping_pong',
 	'xe_oa',
 	'xe_pat',
+        'xe_pci_membarrier',
 	'xe_peer2peer',
 	'xe_pm',
 	'xe_pm_residency',
-- 
2.34.1



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