[PATCH i-g-t 1/2] drm-uapi/xe: Sync with OA syncs uapi update
Kamil Konieczny
kamil.konieczny at linux.intel.com
Mon Oct 28 15:16:55 UTC 2024
Hi Ashutosh,
On 2024-10-25 at 11:52:04 -0700, Ashutosh Dixit wrote:
> Align with kernel commit c8507a25cebd ("drm/xe/oa/uapi: Define and parse OA
> sync properties") which adds OA syncs uapi.
>
> Signed-off-by: Ashutosh Dixit <ashutosh.dixit at intel.com>
> ---
> include/drm-uapi/xe_drm.h | 29 ++++++++++++++++++++++++-----
> 1 file changed, 24 insertions(+), 5 deletions(-)
>
> diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
> index f0a450db95..4a8a4a63e9 100644
> --- a/include/drm-uapi/xe_drm.h
> +++ b/include/drm-uapi/xe_drm.h
> @@ -3,8 +3,8 @@
> * Copyright © 2023 Intel Corporation
> */
>
> -#ifndef _XE_DRM_H_
> -#define _XE_DRM_H_
> +#ifndef _UAPI_XE_DRM_H_
> +#define _UAPI_XE_DRM_H_
imho this shouldn't be here, did you use
make INSTALL_HDR_PATH=<dest-dir> headers_install
documented in README.md?
Regards,
Kamil
>
> #include "drm.h"
>
> @@ -134,7 +134,7 @@ extern "C" {
> * redefine the interface more easily than an ever growing struct of
> * increasing complexity, and for large parts of that interface to be
> * entirely optional. The downside is more pointer chasing; chasing across
> - * the boundary with pointers encapsulated inside u64.
> + * the __user boundary with pointers encapsulated inside u64.
> *
> * Example chaining:
> *
> @@ -512,7 +512,9 @@ struct drm_xe_query_gt_list {
> * containing the following in mask:
> * ``DSS_COMPUTE ff ff ff ff 00 00 00 00``
> * means 32 DSS are available for compute.
> - * - %DRM_XE_TOPO_L3_BANK - To query the mask of enabled L3 banks
> + * - %DRM_XE_TOPO_L3_BANK - To query the mask of enabled L3 banks. This type
> + * may be omitted if the driver is unable to query the mask from the
> + * hardware.
> * - %DRM_XE_TOPO_EU_PER_DSS - To query the mask of Execution Units (EU)
> * available per Dual Sub Slices (DSS). For example a query response
> * containing the following in mask:
> @@ -1483,6 +1485,7 @@ struct drm_xe_oa_unit {
> /** @capabilities: OA capabilities bit-mask */
> __u64 capabilities;
> #define DRM_XE_OA_CAPS_BASE (1 << 0)
> +#define DRM_XE_OA_CAPS_SYNCS (1 << 1)
>
> /** @oa_timestamp_freq: OA timestamp freq */
> __u64 oa_timestamp_freq;
> @@ -1632,6 +1635,22 @@ enum drm_xe_oa_property_id {
> * to be disabled for the stream exec queue.
> */
> DRM_XE_OA_PROPERTY_NO_PREEMPT,
> +
> + /**
> + * @DRM_XE_OA_PROPERTY_NUM_SYNCS: Number of syncs in the sync array
> + * specified in @DRM_XE_OA_PROPERTY_SYNCS
> + */
> + DRM_XE_OA_PROPERTY_NUM_SYNCS,
> +
> + /**
> + * @DRM_XE_OA_PROPERTY_SYNCS: Pointer to struct @drm_xe_sync array
> + * with array size specified via @DRM_XE_OA_PROPERTY_NUM_SYNCS. OA
> + * configuration will wait till input fences signal. Output fences
> + * will signal after the new OA configuration takes effect. For
> + * @DRM_XE_SYNC_TYPE_USER_FENCE, @addr is a user pointer, similar
> + * to the VM bind case.
> + */
> + DRM_XE_OA_PROPERTY_SYNCS,
> };
>
> /**
> @@ -1698,4 +1717,4 @@ struct drm_xe_oa_stream_info {
> }
> #endif
>
> -#endif /* _XE_DRM_H_ */
> +#endif /* _UAPI_XE_DRM_H_ */
> --
> 2.41.0
>
More information about the igt-dev
mailing list