[PATCH i-g-t v6 09/17] tests/xe_exec_sip: Introduce invalid instruction tests

Manszewski, Christoph christoph.manszewski at intel.com
Fri Sep 13 11:50:14 UTC 2024


Hi Zbigniew,

On 9.09.2024 09:21, Zbigniew Kempczyński wrote:
> On Thu, Sep 05, 2024 at 11:28:04AM +0200, Christoph Manszewski wrote:
>> From: Andrzej Hajda <andrzej.hajda at intel.com>
>>
>> Xe2 and earlier gens are able to handle very limited set of invalid
>> instructions - only illegal and undefined opcodes, other errors in
>> instruction can cause undefined behavior.
>> Illegal/undefined opcode results in:
>> - setting illegal opcode status bit - cr0.1[28],
>> - calling SIP if illegal opcode bit is enabled - cr0.1[12].
>> cr0.1[12] can be enabled directly from the thread or by thread dispatcher
>> from Interface Descriptor Data provided to COMPUTE_WALKER instruction.
>>
>> Implemented cases:
>> - check if SIP is not called when exception is not enabled,
>> - check if SIP is called when exception is enabled from EU thread,
>> - check if SIP is called when exception is enabled from COMPUTE_WALKER
>>
>> Signed-off-by: Andrzej Hajda <andrzej.hajda at intel.com>
>> Cc: Mika Kuoppala <mika.kuoppala at intel.com>
>> Cc: Dominik Grzegorzek <dominik.grzegorzek at intel.com>
>> Signed-off-by: Christoph Manszewski <christoph.manszewski at intel.com>
> 
> I've some observation - tests are passing but I've doubts regarding
> their completion. I mean I observe hang and test report success after
> job timeout.

Well for the 'sanity-after-timeout' sub test this is what it actually 
intends to do - cause a timeout and see if we are able to run a basic 
workload after this.

As for 'invalidinstr-*-enabled' I also assume this is expected since 
executing an invalid instruction causes an exception and no one 
handles/clears it. But maybe we should? I will pass this one down to 
@Andrzej.

Thanks,
Christoph

> 
> --
> Zbigniew


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