[PATCH i-g-t] lib/amdgpu: Add priority and secure flags support for user queues
Zhang, Jesse(Jie)
Jesse.Zhang at amd.com
Thu Apr 17 08:48:19 UTC 2025
[AMD Official Use Only - AMD Internal Distribution Only]
-----Original Message-----
From: Khatri, Sunil <Sunil.Khatri at amd.com>
Sent: Thursday, April 17, 2025 1:52 PM
To: Zhang, Jesse(Jie) <Jesse.Zhang at amd.com>; igt-dev at lists.freedesktop.org
Cc: Prosyak, Vitaly <Vitaly.Prosyak at amd.com>; Deucher, Alexander <Alexander.Deucher at amd.com>; Koenig, Christian <Christian.Koenig at amd.com>; Zhang, Jesse(Jie) <Jesse.Zhang at amd.com>; Zhang, Jesse(Jie) <Jesse.Zhang at amd.com>
Subject: RE: [PATCH i-g-t] lib/amdgpu: Add priority and secure flags support for user queues
[AMD Official Use Only - AMD Internal Distribution Only]
In general, UAPI changes should be part of a different change and only uapi should be part of it. Also make sure that libdrm/kernel changes are merged before igt uapi changes are made.
Will split the patch. Libdrm/kernel is now merged.
Thanks
Jesse
Regards
Sunil Khatri
-----Original Message-----
From: igt-dev <igt-dev-bounces at lists.freedesktop.org> On Behalf Of Jesse.zhang at amd.com
Sent: Thursday, April 17, 2025 7:41 AM
To: igt-dev at lists.freedesktop.org
Cc: Prosyak, Vitaly <Vitaly.Prosyak at amd.com>; Deucher, Alexander <Alexander.Deucher at amd.com>; Koenig, Christian <Christian.Koenig at amd.com>; Zhang, Jesse(Jie) <Jesse.Zhang at amd.com>; Zhang, Jesse(Jie) <Jesse.Zhang at amd.com>
Subject: [PATCH i-g-t] lib/amdgpu: Add priority and secure flags support for user queues
This patch adds support for queue priority levels and secure queue creation flags in the user queue interface. The changes include:
1. Added priority level definitions in amdgpu_drm.h:
- NORMAL_LOW, LOW, NORMAL_HIGH, HIGH (admin only)
- Priority mask and shift values for flag handling
- Secure queue flag for protected content access
2. Extended the amdgpu_ring_context struct to store queue priority
3. Modified amdgpu_user_queue_create() to:
- Parse and pass through priority flags from context
- Handle secure queue flag
- Include flags in queue creation IOCTL calls
The priority levels allow workloads to specify different scheduling priorities, with HIGH priority restricted to admin-only use. The secure flag enables creation of queues that can access protected content.
This matches the corresponding libdrm changes in commit fdf384d4b546
("amdgpu: add priority and secure flags for user queues").
Signed-off-by: Jesse.Zhang <Jesse.zhang at amd.com>
---
include/drm-uapi/amdgpu_drm.h | 12 +++++++++++-
lib/amdgpu/amd_ip_blocks.h | 1 +
lib/amdgpu/amd_user_queue.c | 15 +++++++++++----
3 files changed, 23 insertions(+), 5 deletions(-)
diff --git a/include/drm-uapi/amdgpu_drm.h b/include/drm-uapi/amdgpu_drm.h index 8191d0bd0..3f4813879 100644
--- a/include/drm-uapi/amdgpu_drm.h
+++ b/include/drm-uapi/amdgpu_drm.h
@@ -329,6 +329,16 @@ union drm_amdgpu_ctx { #define AMDGPU_USERQ_OP_CREATE 1
#define AMDGPU_USERQ_OP_FREE 2
+/* queue priority levels */
+#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_MASK 0x3 #define
+AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_SHIFT 0 #define
+AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_NORMAL_LOW 0 #define
+AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_LOW 1 #define
+AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_NORMAL_HIGH 2 #define
+AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_HIGH 3 /* admin only */
+/* for queues that need access to protected content */ #define
+AMDGPU_USERQ_CREATE_FLAGS_QUEUE_SECURE (1 << 2)
+
/*
* This structure is a container to pass input configuration
* info for all supported userqueue related operations.
@@ -355,7 +365,7 @@ struct drm_amdgpu_userq_in {
* and doorbell_offset in the doorbell bo.
*/
__u32 doorbell_offset;
- __u32 _pad;
+ __u32 flags;
/**
* @queue_va: Virtual address of the GPU memory which holds the queue
* object. The queue holds the workload packets.
diff --git a/lib/amdgpu/amd_ip_blocks.h b/lib/amdgpu/amd_ip_blocks.h index 231098eb8..7d48f9107 100644
--- a/lib/amdgpu/amd_ip_blocks.h
+++ b/lib/amdgpu/amd_ip_blocks.h
@@ -118,6 +118,7 @@ struct amdgpu_ring_context {
uint32_t *pm4; /* data of the packet */
uint32_t pm4_size; /* max allocated packet size */
bool secure; /* secure or not */
+ uint32_t priority; /* user queue priority */
Ring_context struct is shared for both user and kernel queues and made that way deliberately so we don't have to change igt a lot.
Add this priority along with user queue members which is towards the end of structure but only if its applicable to user queue only else its fine.
Regards
Suni khatri
uint64_t bo_mc; /* GPU address of first buffer */
uint64_t bo_mc2; /* GPU address for p4 packet */
diff --git a/lib/amdgpu/amd_user_queue.c b/lib/amdgpu/amd_user_queue.c index 0cdd0c4f9..b396d0307 100644
--- a/lib/amdgpu/amd_user_queue.c
+++ b/lib/amdgpu/amd_user_queue.c
@@ -270,7 +270,7 @@ void amdgpu_user_queue_create(amdgpu_device_handle device_handle, struct amdgpu_
unsigned int type) {
int r;
- uint64_t gtt_flags = 0;
+ uint64_t gtt_flags = 0, queue_flags = 0;
struct drm_amdgpu_userq_mqd_gfx11 gfx_mqd;
struct drm_amdgpu_userq_mqd_sdma_gfx11 sdma_mqd;
struct drm_amdgpu_userq_mqd_compute_gfx11 compute_mqd; @@ -283,6 +283,13 @@ void amdgpu_user_queue_create(amdgpu_device_handle device_handle, struct amdgpu_
if (ctxt->secure)
gtt_flags |= AMDGPU_GEM_CREATE_ENCRYPTED;
+
+ if (ctxt->secure)
+ queue_flags |= AMDGPU_USERQ_CREATE_FLAGS_QUEUE_SECURE;
This could be clubbed with previous if condition.
+
+ if (ctxt->priority)
+ queue_flags |= ctxt->priority &
+AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_MASK;
+
r = amdgpu_query_uq_fw_area_info(device_handle, AMD_IP_GFX, 0, &ctxt->info);
igt_assert_eq(r, 0);
@@ -404,7 +411,7 @@ void amdgpu_user_queue_create(amdgpu_device_handle device_handle, struct amdgpu_
ctxt->db_handle, DOORBELL_INDEX,
ctxt->queue.mc_addr, USERMODE_QUEUE_SIZE,
ctxt->wptr.mc_addr, ctxt->rptr.mc_addr,
- mqd, &ctxt->queue_id);
+ mqd, queue_flags,
+ &ctxt->queue_id);
igt_assert_eq(r, 0);
break;
@@ -413,7 +420,7 @@ void amdgpu_user_queue_create(amdgpu_device_handle device_handle, struct amdgpu_
ctxt->db_handle, DOORBELL_INDEX,
ctxt->queue.mc_addr, USERMODE_QUEUE_SIZE,
ctxt->wptr.mc_addr, ctxt->rptr.mc_addr,
- mqd, &ctxt->queue_id);
+ mqd, queue_flags,
+ &ctxt->queue_id);
Libdrm patches should land up first. Is libdrm patch raised already ?? Wait for that to be merged if its raise already.
igt_assert_eq(r, 0);
break;
@@ -422,7 +429,7 @@ void amdgpu_user_queue_create(amdgpu_device_handle device_handle, struct amdgpu_
ctxt->db_handle, DOORBELL_INDEX,
ctxt->queue.mc_addr, USERMODE_QUEUE_SIZE,
ctxt->wptr.mc_addr, ctxt->rptr.mc_addr,
- mqd, &ctxt->queue_id);
+ mqd, queue_flags,
+ &ctxt->queue_id);
igt_assert_eq(r, 0);
break;
--
2.25.1
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