[PATCH i-g-t] lib/intel/veboxcopy: Respect buffer MOCS index

Tvrtko Ursulin tvrtko.ursulin at igalia.com
Fri Aug 15 08:49:37 UTC 2025


On 14/08/2025 05:48, Zbigniew Kempczyński wrote:
> On Tue, Jul 22, 2025 at 08:39:06AM +0100, Tvrtko Ursulin wrote:
>> Set the MOCS indices in surface state from the source and
>> destination buffers. So far it was done only for the input
>> buffer and only for 4Tile formats. Always setting it alings
>> with how rendercopy does it and it fixes the AuxCCS tests on
>> ADL when target is of the MC flavour.
>>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at igalia.com>
>> Cc: Imre Deak <imre.deak at intel.com>
>> Cc: Juha-Pekka Heikkilä <juha-pekka.heikkila at intel.com>
>> Cc: Mika Kahola <mika.kahola at intel.com>
>> ---
>> Lets see what the CI will think of this change.
>>
>> Curiously the AuxCCS tests where target is RC, so rendercopy
>> which does set the MOCS correctly is used, are still flaky so
>> that sounds like a different problem.
>> ---
>>   lib/veboxcopy_gen12.c | 4 ++++
>>   1 file changed, 4 insertions(+)
>>
>> diff --git a/lib/veboxcopy_gen12.c b/lib/veboxcopy_gen12.c
>> index 4e3aefaf1f44..2193433a1c00 100644
>> --- a/lib/veboxcopy_gen12.c
>> +++ b/lib/veboxcopy_gen12.c
>> @@ -258,6 +258,8 @@ static void emit_tiling_convert_cmd(struct intel_bb *ibb,
>>   
>>   	if (HAS_4TILE(ibb->devid))
>>   		tc->tc1_2.input_mocs_idx = IS_DG2(ibb->devid) ? 3 : 9;
>> +	else
>> +		tc->tc1_2.input_mocs_idx = src->mocs_index;
>>   
>>   	tc->tc1_2.input_tiled_resource_mode = src->tiling == I915_TILING_Yf;
>>   
>> @@ -278,6 +280,8 @@ static void emit_tiling_convert_cmd(struct intel_bb *ibb,
>>   			dst->compression == I915_COMPRESSION_RENDER;
>>   	}
>>   
>> +	tc->tc3_4.output_mocs_idx = dst->mocs_index;
>> +
>>   	if (HAS_4TILE(ibb->devid))
>>   		tc->tc3_4.output_mocs_idx = IS_DG2(ibb->devid) ? 3 : 9;
>>   
>> -- 
>> 2.48.0
>>
> 
> According how intel_buf selects uc mocs index in the initialization
> part (for DEFAULT_MOCS_INDEX) it looks good to me.
> 
> Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>

Thank you!

I have pushed it so I can respin the AuxCCS xe series and fingers 
crossed get some green results.

Regards,

Tvrtko



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