[PATCH i-g-t v1] tests/intel/kms_fbc_dirty_rect: Limit to single pipe on simulation

[Govindapillai, Vinod]

On Tue, 2025-08-26 at 12:37 +0530, Santhosh Reddy Guddati wrote:
> Limit the subtests to execute only on the first valid pipe/output
> as execution is slow on simulation environments.
> 
> Signed-off-by: Santhosh Reddy Guddati <santhosh.reddy.guddati at intel.com>
> ---
>  tests/intel/kms_fbc_dirty_rect.c | 24 ++++++++++++++++++++++--
>  1 file changed, 22 insertions(+), 2 deletions(-)
> 
> diff --git a/tests/intel/kms_fbc_dirty_rect.c b/tests/intel/kms_fbc_dirty_rect.c
> index 07d616d90..61c0555c6 100644
> --- a/tests/intel/kms_fbc_dirty_rect.c
> +++ b/tests/intel/kms_fbc_dirty_rect.c
> @@ -73,6 +73,7 @@ typedef struct {
>  		FEATURE_COUNT = 8,
>  		FEATURE_DEFAULT = 8,
>  	} feature;
> +	bool is_simulation;
>  } data_t;
>  
>  static void set_damage_clip_w(struct drm_mode_rect *damage, int x1, int y1, int width, int
> height)
> @@ -449,12 +450,16 @@ igt_main
>  		igt_display_require_output(&data.display);
>  		igt_require_f(intel_display_ver(intel_get_drm_devid(data.drm_fd)) >= 30,
>  			      "FBC with dirty region is not supported\n");
> +		data.is_simulation = igt_run_in_simulation();
>  	}
>  
>  	igt_subtest_with_dynamic("fbc-dirty-rectangle-out-visible-area") {
> +		bool single_pipe = false;
>  		data.feature = FEATURE_FBC;
>  
>  		for_each_pipe(&data.display, data.pipe) {
> +			if (data.is_simulation && single_pipe)
> +				break;
>  			for_each_valid_output_on_pipe(&data.display, data.pipe, data.output) {
>  				data.format = DRM_FORMAT_XRGB8888;
>  
> @@ -464,14 +469,20 @@ igt_main
>  					fbc_dirty_rectangle_test(&data,
>  						fbc_dirty_rectangle_outside_visible_region);
>  				}
> +				single_pipe = true;
> +				if (data.is_simulation)
> +					break;
>  			}
>  		}
>  	}
>  
>  	igt_subtest_with_dynamic("fbc-dirty-rectangle-dirtyfb-tests") {
> +		bool single_pipe = false;
>  		data.feature = FEATURE_FBC;
>  
>  		for_each_pipe(&data.display, data.pipe) {
> +			if (data.is_simulation && single_pipe)
> +				break;
>  			for_each_valid_output_on_pipe(&data.display, data.pipe, data.output) {
>  				data.format = DRM_FORMAT_XRGB8888;
>  
> @@ -481,6 +492,9 @@ igt_main
>  					fbc_dirty_rectangle_test(&data,
>  							fbc_dirty_rectangle_dirtyfb);
>  				}
> +				single_pipe = true;
> +				if (data.is_simulation)
> +					break;
>  			}
>  		}
>  	}
> @@ -488,13 +502,16 @@ igt_main
>  	igt_subtest_with_dynamic("fbc-dirty-rectangle-different-formats") {
>  		uint32_t formats[] = {DRM_FORMAT_XRGB8888, DRM_FORMAT_ARGB8888,
> DRM_FORMAT_RGB565};
>  		int num_formats = ARRAY_SIZE(formats);
> -
> +		bool single_pipe = false;
>  		data.feature = FEATURE_FBC;
>  
>  		for_each_pipe(&data.display, data.pipe) {
> +			if (data.is_simulation && single_pipe)
> +				break;
>  			for_each_valid_output_on_pipe(&data.display, data.pipe, data.output) {
> -
>  				for (int i = 0; i < num_formats; i++) {
> +					if (data.is_simulation && i > 0)
> +						break;
I guess, you can just break at the end of this for loop. no need to check if i > 0

But is this also required? Only one format? Should this be a separate patch then?


>  					igt_dynamic_f("pipe-%s-%s-format-%s",
>  						       kmstest_pipe_name(data.pipe),
>  						       igt_output_name(data.output),
> @@ -504,6 +521,9 @@ igt_main
>  							fbc_dirty_rectangle_basic);
>  					}
>  				}
> +				single_pipe = true;
> +				if (data.is_simulation)
> +					break;

And a suggestion that the above would be bit more logical if we have,

			     single_ pipe = data.is_simulation
			     if (single_pipe)
			     	break; 
>  			}
			if (single_pipe)
				break; 

BR
Vinod

>  		}
>  	}