[PATCH 2/2] tests/amdgpu: Add user queue tests for SDMA in deadlock tests

[vitaly prosyak]

Both patches looks good to me. Reviewed-by Vitaly Prosyak <vitaly.prosyak at amd.com>

On 2025-08-26 02:45, Jesse.Zhang wrote:
> - Modify existing tests to pass an additional 'false' parameter to the
>   amdgpu_wait_memory_helper function to disable the reset functionality.
> - Add new tests to cover various GPU reset scenarios triggered by SDMA:
>   - Test GPU reset by SDMA with bad opcode
>   - Test GPU reset by SDMA with bad memory access
>   - Test GPU reset by SDMA with bad register access
>   - Test GPU reset by SDMA with bad packet length
>   - Test GPU reset by flooding the SDMA ring with jobs
> - Update the test descriptions to reflect the new test cases and their purposes.
>
> Signed-off-by: Jesse Zhang <Jesse.Zhang at amd.com>
> ---
>  tests/amdgpu/amd_deadlock.c | 54 ++++++++++++++++++++++++++++++++++---
>  1 file changed, 51 insertions(+), 3 deletions(-)
>
> diff --git a/tests/amdgpu/amd_deadlock.c b/tests/amdgpu/amd_deadlock.c
> index 3456f42c8..41b3aa15e 100644
> --- a/tests/amdgpu/amd_deadlock.c
> +++ b/tests/amdgpu/amd_deadlock.c
> @@ -78,7 +78,7 @@ igt_main
>  	igt_subtest_with_dynamic("amdgpu-deadlock-sdma") {
>  		if (arr_cap[AMD_IP_DMA]) {
>  			igt_dynamic_f("amdgpu-deadlock-sdma")
> -			amdgpu_wait_memory_helper(device, AMDGPU_HW_IP_DMA, &pci);
> +			amdgpu_wait_memory_helper(device, AMDGPU_HW_IP_DMA, &pci, false);
>  		}
>  	}
>  
> @@ -107,7 +107,7 @@ igt_main
>  	igt_subtest_with_dynamic("amdgpu-deadlock-gfx") {
>  		if (arr_cap[AMD_IP_GFX]) {
>  			igt_dynamic_f("amdgpu-deadlock-gfx")
> -			amdgpu_wait_memory_helper(device, AMDGPU_HW_IP_GFX, &pci);
> +			amdgpu_wait_memory_helper(device, AMDGPU_HW_IP_GFX, &pci, false);
>  		}
>  	}
>  
> @@ -124,7 +124,7 @@ igt_main
>  	igt_subtest_with_dynamic("amdgpu-deadlock-compute") {
>  		if (arr_cap[AMD_IP_COMPUTE]) {
>  			igt_dynamic_f("amdgpu-deadlock-compute")
> -			amdgpu_wait_memory_helper(device, AMDGPU_HW_IP_COMPUTE, &pci);
> +			amdgpu_wait_memory_helper(device, AMDGPU_HW_IP_COMPUTE, &pci, false);
>  		}
>  	}
>  
> @@ -196,6 +196,54 @@ igt_main
>  					       AMDGPU_HW_IP_GFX, &pci, true);
>  		}
>  	}
> +
> +	igt_describe("Test-GPU-reset-by-sdma-badop-with-jobs");
> +	igt_subtest_with_dynamic("amdgpu-deadlock-sdma-badop-test-umq") {
> +		if (enable_test && userq_arr_cap[AMD_IP_DMA] &&
> +			is_reset_enable(AMD_IP_DMA, AMDGPU_RESET_TYPE_PER_QUEUE, &pci)) {
> +			igt_dynamic_f("amdgpu-deadlock-sdma-badop-test-umq")
> +			bad_access_ring_helper(device, CMD_STREAM_EXEC_INVALID_OPCODE,
> +					AMDGPU_HW_IP_DMA, &pci, true);
> +		}
> +	}
> +
> +	igt_describe("Test-GPU-reset-by-sdma-bad-mem-with-jobs");
> +	igt_subtest_with_dynamic("amdgpu-deadlock-sdma-bad-mem-test-umq") {
> +		if (enable_test && userq_arr_cap[AMD_IP_DMA] &&
> +			is_reset_enable(AMD_IP_DMA, AMDGPU_RESET_TYPE_PER_QUEUE, &pci)) {
> +			igt_dynamic_f("amdgpu-deadlock-sdma-bad-mem-test-umq")
> +			bad_access_ring_helper(device, CMD_STREAM_TRANS_BAD_MEM_ADDRESS,
> +					AMDGPU_HW_IP_DMA, &pci, true);
> +		}
> +	}
> +
> +	igt_describe("Test-GPU-reset-by-sdma-bad-reg-with-jobs");
> +	igt_subtest_with_dynamic("amdgpu-deadlock-sdma-bad-reg-test-umq") {
> +		if (enable_test && userq_arr_cap[AMD_IP_DMA] &&
> +			is_reset_enable(AMD_IP_DMA, AMDGPU_RESET_TYPE_PER_QUEUE, &pci)) {
> +			igt_dynamic_f("amdgpu-deadlock-sdma-bad-reg-test-umq")
> +			bad_access_ring_helper(device, CMD_STREAM_TRANS_BAD_REG_ADDRESS,
> +					AMDGPU_HW_IP_DMA, &pci, true);
> +		}
> +	}
> +
> +	igt_describe("Test-GPU-reset-by-sdma-bad-length-with-jobs");
> +	igt_subtest_with_dynamic("amdgpu-deadlock-sdma-bad-length-test-umq") {
> +		if (enable_test && userq_arr_cap[AMD_IP_DMA] &&
> +			is_reset_enable(AMD_IP_DMA, AMDGPU_RESET_TYPE_PER_QUEUE, &pci)) {
> +			igt_dynamic_f("amdgpu-deadlock-sdma-bad-length-test-umq")
> +			bad_access_ring_helper(device, CMD_STREAM_EXEC_INVALID_PACKET_LENGTH,
> +					AMDGPU_HW_IP_DMA, &pci, true);
> +		}
> +	}
> +
> +	igt_describe("Test-GPU-reset-by-flooding-sdma-ring-with-jobs");
> +	igt_subtest_with_dynamic("amdgpu-deadlock-sdma-umq") {
> +		if (enable_test && userq_arr_cap[AMD_IP_DMA]) {
> +			igt_dynamic_f("amdgpu-deadlock-sdma-umq")
> +			amdgpu_wait_memory_helper(device, AMDGPU_HW_IP_DMA, &pci, true);
> +		}
> +	}
>  #endif
>  
>  	igt_fixture {