[PATCH i-g-t] lib/amdgpu: enhance wait memory helper
Jesse.zhang@amd.com
jesse.zhang at amd.com
Thu Jan 2 03:53:08 UTC 2025
Test all sdma rings and ensure
that all rings can be recovered.
Cc: Vitaly Prosyak <vitaly.prosyak at amd.com>
Cc: Christian Koenig <christian.koenig at amd.com>
Cc: Alexander Deucher <alexander.deucher at amd.com>
Signed-off-by: Jesse Zhang <jesse.zhang at amd.com>
---
lib/amdgpu/amd_deadlock_helpers.c | 91 ++++++++++++++++++++++++++++++-
1 file changed, 88 insertions(+), 3 deletions(-)
diff --git a/lib/amdgpu/amd_deadlock_helpers.c b/lib/amdgpu/amd_deadlock_helpers.c
index 87078548c..dabd7ae76 100644
--- a/lib/amdgpu/amd_deadlock_helpers.c
+++ b/lib/amdgpu/amd_deadlock_helpers.c
@@ -43,8 +43,8 @@ write_mem_address(void *data)
return 0;
}
-void
-amdgpu_wait_memory_helper(amdgpu_device_handle device_handle, unsigned int ip_type)
+static void
+amdgpu_wait_memory(amdgpu_device_handle device_handle, unsigned int ip_type, uint32_t priority)
{
amdgpu_context_handle context_handle;
amdgpu_bo_handle ib_result_handle;
@@ -65,7 +65,11 @@ amdgpu_wait_memory_helper(amdgpu_device_handle device_handle, unsigned int ip_ty
int job_count = 0;
struct amdgpu_cmd_base *base_cmd = get_cmd_base();
- r = amdgpu_cs_ctx_create(device_handle, &context_handle);
+ if( priority == AMDGPU_CTX_PRIORITY_HIGH)
+ r = amdgpu_cs_ctx_create2(device_handle, AMDGPU_CTX_PRIORITY_HIGH, &context_handle);
+ else
+ r = amdgpu_cs_ctx_create(device_handle, &context_handle);
+
igt_assert_eq(r, 0);
r = amdgpu_bo_alloc_and_map_raw(device_handle, bo_cmd_size, bo_cmd_size,
@@ -169,6 +173,87 @@ amdgpu_wait_memory_helper(amdgpu_device_handle device_handle, unsigned int ip_ty
free_cmd_base(base_cmd);
}
+void amdgpu_wait_memory_helper(amdgpu_device_handle device_handle, unsigned int ip_type)
+{
+ int r;
+ FILE *fp;
+ char cmd[1024];
+ char buffer[128];
+ long sched_mask = 0;
+ struct drm_amdgpu_info_hw_ip info;
+ uint32_t ring_id, prio;
+ char sysfs[125];
+
+ r = amdgpu_query_hw_ip_info(device_handle, ip_type, 0, &info);
+ igt_assert_eq(r, 0);
+ if (!info.available_rings)
+ igt_info("SKIP ... as there's no ring for ip %d\n", ip_type);
+
+ if (ip_type == AMD_IP_GFX)
+ snprintf(sysfs, sizeof(sysfs) - 1, "/sys/kernel/debug/dri/0/amdgpu_gfx_sched_mask");
+ else if (ip_type == AMD_IP_COMPUTE)
+ snprintf(sysfs, sizeof(sysfs) - 1, "/sys/kernel/debug/dri/0/amdgpu_compute_sched_mask");
+ else if (ip_type == AMD_IP_DMA)
+ snprintf(sysfs, sizeof(sysfs) - 1, "/sys/kernel/debug/dri/0/amdgpu_sdma_sched_mask");
+
+ snprintf(cmd, sizeof(cmd) - 1, "sudo cat %s", sysfs);
+ r = access(sysfs, R_OK);
+ if (!r) {
+ fp = popen(cmd, "r");
+ if (fp == NULL)
+ igt_skip("read the sysfs failed: %s \n",sysfs);
+
+ if (fgets(buffer, 128, fp) != NULL)
+ sched_mask = strtol(buffer, NULL, 16);
+
+ pclose(fp);
+ } else {
+ sched_mask = 1;
+ igt_info("The scheduling ring only enables one for ip %d\n", ip_type);
+ }
+
+ for (ring_id = 0; (0x1 << ring_id) <= sched_mask; ring_id++) {
+ /* check sched is ready is on the ring. */
+ if (!((1 << ring_id) & sched_mask))
+ continue;
+
+ if (sched_mask > 1 && ring_id == 0 &&
+ ip_type == AMD_IP_COMPUTE) {
+ /* for the compute multiple rings, the first queue
+ * as high priority compute queue.
+ * Need to create a high priority ctx.
+ */
+ prio = AMDGPU_CTX_PRIORITY_HIGH;
+ } else if (sched_mask > 1 && ring_id == 1 &&
+ ip_type == AMD_IP_GFX) {
+ /* for the gfx multiple rings, pipe1 queue0 as
+ * high priority graphics queue.
+ * Need to create a high priority ctx.
+ */
+ prio = AMDGPU_CTX_PRIORITY_HIGH;
+ } else {
+ prio = AMDGPU_CTX_PRIORITY_NORMAL;
+ }
+
+ if (sched_mask > 1) {
+ snprintf(cmd, sizeof(cmd) - 1, "sudo echo 0x%x > %s",
+ 0x1 << ring_id, sysfs);
+ r = system(cmd);
+ igt_assert_eq(r, 0);
+ }
+
+ amdgpu_wait_memory(device_handle, ip_type, prio);
+ }
+
+ /* recover the sched mask */
+ if (sched_mask > 1) {
+ snprintf(cmd, sizeof(cmd) - 1, "sudo echo 0x%lx > %s",sched_mask, sysfs);
+ r = system(cmd);
+ igt_assert_eq(r, 0);
+ }
+
+}
+
static void
bad_access_helper(amdgpu_device_handle device_handle, unsigned int cmd_error,
unsigned int ip_type, uint32_t priority)
--
2.25.1
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