[PATCH] tests/amdgpu: find PCI bus, device and function and use it
vitaly.prosyak at amd.com
vitaly.prosyak at amd.com
Tue Jan 21 04:40:25 UTC 2025
From: Vitaly Prosyak <vitaly.prosyak at amd.com>
Use the PCI domain, bus, device, and function ID to determine the
required path from the file descriptor. This is utilized to check
whether the GPU reset mask is enabled for GFX, compute, or SDMA rings.
Cc: Christian Koenig <christian.koenig at amd.com>
Cc: Alexander Deucher <alexander.deucher at amd.com>
Cc: Jesse Zhang <jesse.zhang at amd.com>
Signed-off-by: Vitaly Prosyak <vitaly.prosyak at amd.com>
---
lib/amdgpu/amd_ip_blocks.c | 9 +++++++--
lib/amdgpu/amd_ip_blocks.h | 2 +-
tests/amdgpu/amd_deadlock.c | 18 +++++++++---------
tests/amdgpu/amd_dispatch.c | 15 +++++++++------
tests/amdgpu/amd_pci_unplug.c | 1 -
tests/amdgpu/amd_queue_reset.c | 6 +++++-
6 files changed, 31 insertions(+), 20 deletions(-)
diff --git a/lib/amdgpu/amd_ip_blocks.c b/lib/amdgpu/amd_ip_blocks.c
index 9749e2072..2b1b84414 100644
--- a/lib/amdgpu/amd_ip_blocks.c
+++ b/lib/amdgpu/amd_ip_blocks.c
@@ -1004,7 +1004,7 @@ asic_rings_readness(amdgpu_device_handle device_handle, uint32_t mask,
*/
bool
-is_reset_enable(enum amd_ip_block_type ip_type, uint32_t reset_type)
+is_reset_enable(enum amd_ip_block_type ip_type, uint32_t reset_type, const struct pci_addr *pci)
{
char cmd[256];
FILE *fp, *fp2;
@@ -1019,7 +1019,12 @@ is_reset_enable(enum amd_ip_block_type ip_type, uint32_t reset_type)
else
snprintf(reset_mask, sizeof(reset_mask) - 1, "sdma_reset_mask");
- snprintf(cmd, sizeof(cmd) - 1, "sudo cat /sys/kernel/debug/dri/0/name |grep -oP '(?<=dev=)[0-9:.]+'");
+ if( pci)
+ snprintf(cmd, sizeof(cmd) - 1, "sudo cat /sys/kernel/debug/dri/%04x:%02x:%02x.%01x/name |grep -oP '(?<=dev=)[0-9:.]+'",
+ pci->domain, pci->bus, pci->device, pci->function);
+ else
+ snprintf(cmd, sizeof(cmd) - 1, "sudo cat /sys/kernel/debug/dri/0/name |grep -oP '(?<=dev=)[0-9:.]+'");
+
fp = popen(cmd, "r");
if (fp == NULL)
return false;
diff --git a/lib/amdgpu/amd_ip_blocks.h b/lib/amdgpu/amd_ip_blocks.h
index dc4d87151..595b2b16b 100644
--- a/lib/amdgpu/amd_ip_blocks.h
+++ b/lib/amdgpu/amd_ip_blocks.h
@@ -233,7 +233,7 @@ void
asic_rings_readness(amdgpu_device_handle device_handle, uint32_t mask, bool arr[AMD_IP_MAX]);
bool
-is_reset_enable(enum amd_ip_block_type ip_type, uint32_t reset_type);
+is_reset_enable(enum amd_ip_block_type ip_type, uint32_t reset_type, const struct pci_addr *pci);
int
get_pci_addr_from_fd(int fd, struct pci_addr *pci);
diff --git a/tests/amdgpu/amd_deadlock.c b/tests/amdgpu/amd_deadlock.c
index 29b7ae509..472f28e68 100644
--- a/tests/amdgpu/amd_deadlock.c
+++ b/tests/amdgpu/amd_deadlock.c
@@ -76,7 +76,7 @@ igt_main
igt_describe("Test-GPU-reset-by-access-gfx-illegal-reg");
igt_subtest_with_dynamic("amdgpu-gfx-illegal-reg-access") {
if (arr_cap[AMD_IP_GFX] &&
- is_reset_enable(AMD_IP_GFX, AMDGPU_RESET_TYPE_PER_QUEUE)) {
+ is_reset_enable(AMD_IP_GFX, AMDGPU_RESET_TYPE_PER_QUEUE, &pci)) {
igt_dynamic_f("amdgpu-illegal-reg-access")
bad_access_ring_helper(device, CMD_STREAM_TRANS_BAD_REG_ADDRESS,
AMDGPU_HW_IP_GFX, &pci);
@@ -86,7 +86,7 @@ igt_main
igt_describe("Test-GPU-reset-by-access-gfx-illegal-mem-addr");
igt_subtest_with_dynamic("amdgpu-gfx-illegal-mem-access") {
if (arr_cap[AMD_IP_GFX] &&
- is_reset_enable(AMD_IP_GFX, AMDGPU_RESET_TYPE_PER_QUEUE)) {
+ is_reset_enable(AMD_IP_GFX, AMDGPU_RESET_TYPE_PER_QUEUE, &pci)) {
igt_dynamic_f("amdgpu-illegal-mem-access")
bad_access_ring_helper(device, CMD_STREAM_TRANS_BAD_MEM_ADDRESS,
AMDGPU_HW_IP_GFX, &pci);
@@ -105,7 +105,7 @@ igt_main
igt_describe("Test-GPU-reset-by-access-compute-illegal-mem-addr");
igt_subtest("amdgpu-compute-illegal-mem-access") {
if (arr_cap[AMD_IP_COMPUTE] &&
- is_reset_enable(AMD_IP_COMPUTE, AMDGPU_RESET_TYPE_PER_QUEUE)) {
+ is_reset_enable(AMD_IP_COMPUTE, AMDGPU_RESET_TYPE_PER_QUEUE, &pci)) {
bad_access_ring_helper(device, CMD_STREAM_TRANS_BAD_MEM_ADDRESS,
AMDGPU_HW_IP_COMPUTE, &pci);
}
@@ -122,7 +122,7 @@ igt_main
igt_describe("Test-GPU-reset-by-sdma-corrupted-header-with-jobs");
igt_subtest_with_dynamic("amdgpu-deadlock-sdma-corrupted-header-test") {
if (arr_cap[AMD_IP_DMA] &&
- is_reset_enable(AMD_IP_DMA, AMDGPU_RESET_TYPE_PER_QUEUE)) {
+ is_reset_enable(AMD_IP_DMA, AMDGPU_RESET_TYPE_PER_QUEUE, &pci)) {
igt_dynamic_f("amdgpu-deadlock-sdma-corrupted-header-test")
amdgpu_hang_sdma_ring_helper(device, DMA_CORRUPTED_HEADER_HANG, &pci);
}
@@ -131,7 +131,7 @@ igt_main
igt_describe("Test-GPU-reset-by-sdma-slow-linear-copy-with-jobs");
igt_subtest_with_dynamic("amdgpu-deadlock-sdma-slow-linear-copy") {
if (arr_cap[AMD_IP_DMA] &&
- is_reset_enable(AMD_IP_DMA, AMDGPU_RESET_TYPE_PER_QUEUE)) {
+ is_reset_enable(AMD_IP_DMA, AMDGPU_RESET_TYPE_PER_QUEUE, &pci)) {
igt_dynamic_f("amdgpu-deadlock-sdma-slow-linear-copy")
amdgpu_hang_sdma_ring_helper(device, DMA_SLOW_LINEARCOPY_HANG, &pci);
}
@@ -140,7 +140,7 @@ igt_main
igt_describe("Test-GPU-reset-by-sdma-badop-with-jobs");
igt_subtest_with_dynamic("amdgpu-deadlock-sdma-badop-test") {
if (arr_cap[AMD_IP_DMA] &&
- is_reset_enable(AMD_IP_DMA, AMDGPU_RESET_TYPE_PER_QUEUE)) {
+ is_reset_enable(AMD_IP_DMA, AMDGPU_RESET_TYPE_PER_QUEUE, &pci)) {
igt_dynamic_f("amdgpu-deadlock-sdma-badop-test")
bad_access_ring_helper(device, CMD_STREAM_EXEC_INVALID_OPCODE,
AMDGPU_HW_IP_DMA, &pci);
@@ -150,7 +150,7 @@ igt_main
igt_describe("Test-GPU-reset-by-sdma-bad-mem-with-jobs");
igt_subtest_with_dynamic("amdgpu-deadlock-sdma-bad-mem-test") {
if (arr_cap[AMD_IP_DMA] &&
- is_reset_enable(AMD_IP_DMA, AMDGPU_RESET_TYPE_PER_QUEUE)) {
+ is_reset_enable(AMD_IP_DMA, AMDGPU_RESET_TYPE_PER_QUEUE, &pci)) {
igt_dynamic_f("amdgpu-deadlock-sdma-bad-mem-test")
bad_access_ring_helper(device, CMD_STREAM_TRANS_BAD_MEM_ADDRESS,
AMDGPU_HW_IP_DMA, &pci);
@@ -160,7 +160,7 @@ igt_main
igt_describe("Test-GPU-reset-by-sdma-bad-reg-with-jobs");
igt_subtest_with_dynamic("amdgpu-deadlock-sdma-bad-reg-test") {
if (arr_cap[AMD_IP_DMA] &&
- is_reset_enable(AMD_IP_DMA, AMDGPU_RESET_TYPE_PER_QUEUE)) {
+ is_reset_enable(AMD_IP_DMA, AMDGPU_RESET_TYPE_PER_QUEUE, &pci)) {
igt_dynamic_f("amdgpu-deadlock-sdma-bad-reg-test")
bad_access_ring_helper(device, CMD_STREAM_TRANS_BAD_REG_ADDRESS,
AMDGPU_HW_IP_DMA, &pci);
@@ -170,7 +170,7 @@ igt_main
igt_describe("Test-GPU-reset-by-sdma-bad-length-with-jobs");
igt_subtest_with_dynamic("amdgpu-deadlock-sdma-bad-length-test") {
if (arr_cap[AMD_IP_DMA] &&
- is_reset_enable(AMD_IP_DMA, AMDGPU_RESET_TYPE_PER_QUEUE)) {
+ is_reset_enable(AMD_IP_DMA, AMDGPU_RESET_TYPE_PER_QUEUE, &pci)) {
igt_dynamic_f("amdgpu-deadlock-sdma-bad-length-test")
bad_access_ring_helper(device, CMD_STREAM_EXEC_INVALID_PACKET_LENGTH,
AMDGPU_HW_IP_DMA, &pci);
diff --git a/tests/amdgpu/amd_dispatch.c b/tests/amdgpu/amd_dispatch.c
index 23d07561c..26b179f35 100644
--- a/tests/amdgpu/amd_dispatch.c
+++ b/tests/amdgpu/amd_dispatch.c
@@ -78,6 +78,7 @@ igt_main
int fd = -1;
int r;
bool arr_cap[AMD_IP_MAX] = {0};
+ struct pci_addr pci;
igt_fixture {
uint32_t major, minor;
@@ -90,7 +91,9 @@ igt_main
igt_info("Initialized amdgpu, driver version %d.%d\n",
major, minor);
-
+ igt_skip_on(get_pci_addr_from_fd(fd, &pci));
+ igt_info("PCI Address: domain %04x, bus %02x, device %02x, function %02x\n",
+ pci.domain, pci.bus, pci.device, pci.function);
r = amdgpu_query_gpu_info(device, &gpu_info);
igt_assert_eq(r, 0);
r = setup_amdgpu_ip_blocks(major, minor, &gpu_info, device);
@@ -117,7 +120,7 @@ igt_main
igt_describe("Test GPU reset using a binary shader to hang the job on gfx ring");
igt_subtest_with_dynamic("amdgpu-dispatch-hang-test-gfx-with-IP-GFX") {
if (arr_cap[AMD_IP_GFX] &&
- is_reset_enable(AMD_IP_COMPUTE, AMDGPU_RESET_TYPE_PER_QUEUE)) {
+ is_reset_enable(AMD_IP_COMPUTE, AMDGPU_RESET_TYPE_PER_QUEUE, &pci)) {
igt_dynamic_f("amdgpu-dispatch-hang-test-gfx")
amdgpu_dispatch_hang_gfx(device, BACKEND_SE_GC_SHADER_INVALID_SHADER);
}
@@ -126,7 +129,7 @@ igt_main
igt_describe("Test GPU reset using a binary shader to hang the job on compute ring");
igt_subtest_with_dynamic("amdgpu-dispatch-hang-test-compute-with-IP-COMPUTE") {
if (arr_cap[AMD_IP_COMPUTE] &&
- is_reset_enable(AMD_IP_COMPUTE, AMDGPU_RESET_TYPE_PER_QUEUE)) {
+ is_reset_enable(AMD_IP_COMPUTE, AMDGPU_RESET_TYPE_PER_QUEUE, &pci)) {
igt_dynamic_f("amdgpu-dispatch-hang-test-compute")
amdgpu_dispatch_hang_compute(device, BACKEND_SE_GC_SHADER_INVALID_SHADER);
}
@@ -135,7 +138,7 @@ igt_main
igt_describe("Test GPU reset using a invalid shader program address to hang the job on compute ring");
igt_subtest_with_dynamic("amdgpu-dispatch-invalid-program-addr-test-compute-with-IP-COMPUTE") {
if (arr_cap[AMD_IP_COMPUTE] &&
- is_reset_enable(AMD_IP_COMPUTE, AMDGPU_RESET_TYPE_PER_QUEUE)) {
+ is_reset_enable(AMD_IP_COMPUTE, AMDGPU_RESET_TYPE_PER_QUEUE, &pci)) {
igt_dynamic_f("amdgpu-dispatch-invalid-program-addr-test-compute")
amdgpu_dispatch_hang_compute(device, BACKEND_SE_GC_SHADER_INVALID_PROGRAM_ADDR);
}
@@ -144,7 +147,7 @@ igt_main
igt_describe("Test GPU reset using a invalid shader program setting to hang the job on compute ring");
igt_subtest_with_dynamic("amdgpu-dispatch-invalid-setting-test-compute-with-IP-COMPUTE") {
if (arr_cap[AMD_IP_COMPUTE] &&
- is_reset_enable(AMD_IP_COMPUTE, AMDGPU_RESET_TYPE_PER_QUEUE)) {
+ is_reset_enable(AMD_IP_COMPUTE, AMDGPU_RESET_TYPE_PER_QUEUE, &pci)) {
igt_dynamic_f("amdgpu-dispatch-invalid-setting-test-compute")
amdgpu_dispatch_hang_compute(device, BACKEND_SE_GC_SHADER_INVALID_PROGRAM_SETTING);
}
@@ -153,7 +156,7 @@ igt_main
igt_describe("Test GPU reset using a invalid shader user data to hang the job on compute ring");
igt_subtest_with_dynamic("amdgpu-dispatch-invalid-user-data-test-compute-with-IP-COMPUTE") {
if (arr_cap[AMD_IP_COMPUTE] &&
- is_reset_enable(AMD_IP_COMPUTE, AMDGPU_RESET_TYPE_PER_QUEUE)) {
+ is_reset_enable(AMD_IP_COMPUTE, AMDGPU_RESET_TYPE_PER_QUEUE, &pci)) {
igt_dynamic_f("amdgpu-dispatch-invalid-user-data-test-compute")
amdgpu_dispatch_hang_compute(device, BACKEND_SE_GC_SHADER_INVALID_USER_DATA);
}
diff --git a/tests/amdgpu/amd_pci_unplug.c b/tests/amdgpu/amd_pci_unplug.c
index 4c055b99f..cb88185a0 100644
--- a/tests/amdgpu/amd_pci_unplug.c
+++ b/tests/amdgpu/amd_pci_unplug.c
@@ -47,7 +47,6 @@ igt_main
igt_subtest("amdgpu_hotunplug_with_cs")
amdgpu_hotunplug_with_cs(&setup, &unplug);
- /*TODO about second GPU*/
igt_subtest("amdgpu_hotunplug_with_exported_bo")
amdgpu_hotunplug_with_exported_bo(&setup, &unplug);
diff --git a/tests/amdgpu/amd_queue_reset.c b/tests/amdgpu/amd_queue_reset.c
index 87cf665f3..a7aca4171 100644
--- a/tests/amdgpu/amd_queue_reset.c
+++ b/tests/amdgpu/amd_queue_reset.c
@@ -1126,6 +1126,7 @@ igt_main
unsigned int ring_id_job_good;
unsigned int ring_id_job_bad;
int expect_error;
+ struct pci_addr pci ;
enum amd_ip_block_type ip_tests[3] = {AMD_IP_COMPUTE/*keep first*/, AMD_IP_GFX, AMD_IP_DMA};
enum amd_ip_block_type ip_background = AMD_IP_COMPUTE;
@@ -1202,6 +1203,9 @@ igt_main
igt_require(fd_shm != -1);
launch_background_process(argc, argv, path, &pid_background, fd_shm);
process = PROCESS_TEST;
+ igt_skip_on(get_pci_addr_from_fd(fd, &pci));
+ igt_info("PCI Address: domain %04x, bus %02x, device %02x, function %02x\n",
+ pci.domain, pci.bus, pci.device, pci.function);
} else {
process = PROCESS_BACKGROUND;
}
@@ -1236,7 +1240,7 @@ igt_main
reset = (ip_tests[i] != AMD_IP_DMA) && (it->test == CMD_STREAM_EXEC_INVALID_PACKET_LENGTH) ?
AMDGPU_RESET_TYPE_PER_QUEUE : AMDGPU_RESET_TYPE_PER_PIPE;
- if (arr_cap[ip_tests[i]] && is_reset_enable(ip_tests[i], reset) &&
+ if (arr_cap[ip_tests[i]] && is_reset_enable(ip_tests[i], reset, &pci) &&
get_next_rings(&ring_id_good, &ring_id_bad, info[0].available_rings,
info[i].available_rings, ip_background != ip_tests[i], &ring_id_job_good, &ring_id_job_bad)) {
igt_dynamic_f("amdgpu-%s-ring-good-%d-bad-%d-%s", it->name, ring_id_job_good, ring_id_job_bad,
--
2.34.1
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