[PATCH i-g-t 7/7] tests/xe: Don't assume max GT ID is num_gt - 1

[Zbigniew Kempczyński]

On Mon, Jun 30, 2025 at 09:35:37AM -0700, Matt Roper wrote:
> On future platforms GT IDs may not be consecutive.  The GT mask should
> be consulted when determining whether a GT is valid, and the maximum GT
> ID (not the GT count) should be used when allocating array storage space
> for GTs.
> 
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> ---
>  tests/intel/xe_compute.c | 47 ++++++++++++++++++++--------------------
>  tests/intel/xe_gt_freq.c |  8 +++----
>  2 files changed, 27 insertions(+), 28 deletions(-)
> 
> diff --git a/tests/intel/xe_compute.c b/tests/intel/xe_compute.c
> index 955edf082..658502e35 100644
> --- a/tests/intel/xe_compute.c
> +++ b/tests/intel/xe_compute.c
> @@ -48,13 +48,13 @@ static bool get_num_cslices(u32 gt, u32 *num_slices)
>   * Functionality: ccs mode
>   */
>  static void
> -test_ccs_mode(int num_gt)
> +test_ccs_mode(int fd)
>  {
>  	struct drm_xe_engine_class_instance *hwe;
>  	u32 gt, m, ccs_mode, vm, q, num_slices;
> -	int fd, gt_fd, num_gt_with_ccs_mode = 0;
> +	int new_fd, gt_fd, num_gt_with_ccs_mode = 0;
>  
> -	for (gt = 0; gt < num_gt; gt++) {
> +	xe_for_each_gt(fd, gt) {
>  		if (!get_num_cslices(gt, &num_slices))
>  			continue;
>  
> @@ -74,34 +74,34 @@ test_ccs_mode(int num_gt)
>  			igt_assert(m == ccs_mode);
>  
>  			/* Validate exec queues creation with enabled ccs engines */
> -			fd = drm_open_driver(DRIVER_XE);
> -			vm = xe_vm_create(fd, 0, 0);
> -			xe_for_each_engine(fd, hwe) {
> +			new_fd = drm_open_driver(DRIVER_XE);

Instead of adding new_fd wouldn't be easier to reopen fd?
Some of the code would be intact.

> +			vm = xe_vm_create(new_fd, 0, 0);
> +			xe_for_each_engine(new_fd, hwe) {
>  				if (hwe->gt_id != gt ||
>  				    hwe->engine_class != DRM_XE_ENGINE_CLASS_COMPUTE)
>  					continue;
>  
> -				q = xe_exec_queue_create(fd, vm, hwe, 0);
> -				xe_exec_queue_destroy(fd, q);
> +				q = xe_exec_queue_create(new_fd, vm, hwe, 0);
> +				xe_exec_queue_destroy(new_fd, q);
>  			}
>  
>  			/* Ensure exec queue creation fails for disabled ccs engines */
>  			hwe->gt_id = gt;
>  			hwe->engine_class = DRM_XE_ENGINE_CLASS_COMPUTE;
>  			hwe->engine_instance = m;
> -			igt_assert_neq(__xe_exec_queue_create(fd, vm, 1, 1, hwe, 0, &q), 0);
> +			igt_assert_neq(__xe_exec_queue_create(new_fd, vm, 1, 1, hwe, 0, &q), 0);
>  
> -			xe_vm_destroy(fd, vm);
> -			drm_close_driver(fd);
> +			xe_vm_destroy(new_fd, vm);
> +			drm_close_driver(new_fd);
>  		}
>  
>  		/* Ensure invalid ccs mode setting is rejected */
>  		igt_assert(igt_sysfs_printf(gt_fd, "ccs_mode", "%u", m) < 0);
>  
>  		/* Can't change ccs mode with an open drm clients */
> -		fd = drm_open_driver(DRIVER_XE);
> +		new_fd = drm_open_driver(DRIVER_XE);
>  		igt_assert(igt_sysfs_printf(gt_fd, "ccs_mode", "%u", 1) < 0);
> -		drm_close_driver(fd);
> +		drm_close_driver(new_fd);
>  
>  		/* Set ccs mode back to default value */
>  		igt_assert(igt_sysfs_printf(gt_fd, "ccs_mode", "%u", 1) > 0);
> @@ -119,13 +119,13 @@ test_ccs_mode(int num_gt)
>   * Functionality: ccs mode
>   */
>  static void
> -test_compute_kernel_with_ccs_mode(int num_gt)
> +test_compute_kernel_with_ccs_mode(int fd)
>  {
>  	struct drm_xe_engine_class_instance *hwe;
>  	u32 gt, m, num_slices;
> -	int fd, gt_fd, num_gt_with_ccs_mode = 0;
> +	int new_fd, gt_fd, num_gt_with_ccs_mode = 0;
>  
> -	for (gt = 0; gt < num_gt; gt++) {
> +	xe_for_each_gt(fd, gt) {
>  		if (!get_num_cslices(gt, &num_slices))
>  			continue;
>  
> @@ -138,18 +138,18 @@ test_compute_kernel_with_ccs_mode(int num_gt)
>  			igt_assert(igt_sysfs_printf(gt_fd, "ccs_mode", "%u", m) > 0);
>  
>  			/* Run compute kernel on enabled ccs engines */
> -			fd = drm_open_driver(DRIVER_XE);
> -			xe_for_each_engine(fd, hwe) {
> +			new_fd = drm_open_driver(DRIVER_XE);

Ditto.

--
Zbigniew

> +			xe_for_each_engine(new_fd, hwe) {
>  				if (hwe->gt_id != gt ||
>  				    hwe->engine_class != DRM_XE_ENGINE_CLASS_COMPUTE)
>  					continue;
>  
>  				igt_info("GT-%d: Running compute kernel with ccs_mode %d on ccs engine %d\n",
>  					 gt, m, hwe->engine_instance);
> -				igt_assert_f(xe_run_intel_compute_kernel_on_engine(fd, hwe, NULL, EXECENV_PREF_SYSTEM),
> +				igt_assert_f(xe_run_intel_compute_kernel_on_engine(new_fd, hwe, NULL, EXECENV_PREF_SYSTEM),
>  					     "Unable to run compute kernel successfully\n");
>  			}
> -			drm_close_driver(fd);
> +			drm_close_driver(new_fd);
>  		}
>  
>  		/* Set ccs mode back to default value */
> @@ -180,11 +180,10 @@ test_compute_square(int fd)
>  
>  igt_main
>  {
> -	int xe, num_gt;
> +	int xe;
>  
>  	igt_fixture {
>  		xe = drm_open_driver(DRIVER_XE);
> -		num_gt = xe_number_gt(xe);
>  	}
>  
>  	igt_subtest("compute-square")
> @@ -195,8 +194,8 @@ igt_main
>  
>  	/* ccs mode tests should be run without open gpu file handles */
>  	igt_subtest("ccs-mode-basic")
> -		test_ccs_mode(num_gt);
> +		test_ccs_mode(xe);
>  
>  	igt_subtest("ccs-mode-compute-kernel")
> -		test_compute_kernel_with_ccs_mode(num_gt);
> +		test_compute_kernel_with_ccs_mode(xe);
>  }
> diff --git a/tests/intel/xe_gt_freq.c b/tests/intel/xe_gt_freq.c
> index 689e0296a..2c9080428 100644
> --- a/tests/intel/xe_gt_freq.c
> +++ b/tests/intel/xe_gt_freq.c
> @@ -399,17 +399,17 @@ igt_main
>  	int gt;
>  	struct drm_xe_engine_class_instance *hwe;
>  	uint32_t *stash_min, *stash_max;
> -	int num_gts;
> +	int max_gt;
>  
>  	igt_fixture {
>  		fd = drm_open_driver(DRIVER_XE);
>  
>  		igt_require(xe_sysfs_gt_has_node(fd, 0, "freq0"));
> -		num_gts = xe_number_gt(fd);
> +		max_gt = xe_dev_max_gt(fd);
>  
>  		/* The defaults are the same. Stashing the gt0 is enough */
> -		stash_min = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
> -		stash_max = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
> +		stash_min = (uint32_t *) malloc(sizeof(uint32_t) * max_gt);
> +		stash_max = (uint32_t *) malloc(sizeof(uint32_t) * max_gt);
>  
>  		xe_for_each_gt(fd, gt) {
>  			stash_min[gt] = xe_gt_get_freq(fd, gt, "min");
> -- 
> 2.49.0
>