[PATCH i-g-t v2 1/7] lib/xe: Track valid GT IDs

[Zbigniew Kempczyński]

On Wed, Jul 02, 2025 at 12:32:56PM -0700, Matt Roper wrote:
> Although current Intel platforms always have GTs with consecutive IDs,
> we should rely on this being true in the future.  During initial device
> query, build a bitmask of valid GT IDs that userspace may use.
> 
> v2:
>  - Switch bit assignment to (1ull << ...) to properly support up to
>    64 GTs even on 32-bit architectures.  (Zbigniew)
> 
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> ---
>  lib/xe/xe_query.c | 5 +++++
>  lib/xe/xe_query.h | 3 +++
>  2 files changed, 8 insertions(+)
> 
> diff --git a/lib/xe/xe_query.c b/lib/xe/xe_query.c
> index 0d2e4805c..d7ca08f65 100644
> --- a/lib/xe/xe_query.c
> +++ b/lib/xe/xe_query.c
> @@ -346,6 +346,11 @@ struct xe_device *xe_device_get(int fd)
>  	xe_dev->va_bits = xe_dev->config->info[DRM_XE_QUERY_CONFIG_VA_BITS];
>  	xe_dev->dev_id = xe_dev->config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] & 0xffff;
>  	xe_dev->gt_list = xe_query_gt_list_new(fd);
> +
> +	/* GT IDs may be non-consecutive; keep a mask of valid IDs */
> +	for (int gt = 0; gt < xe_dev->gt_list->num_gt; gt++)
> +		xe_dev->gt_mask |= (1ull << xe_dev->gt_list->gt_list[gt].gt_id);
> +
>  	xe_dev->memory_regions = __memory_regions(xe_dev->gt_list);
>  	xe_dev->engines = xe_query_engines(fd);
>  	xe_dev->mem_regions = xe_query_mem_regions_new(fd);
> diff --git a/lib/xe/xe_query.h b/lib/xe/xe_query.h
> index 1224a723a..37b0cf31e 100644
> --- a/lib/xe/xe_query.h
> +++ b/lib/xe/xe_query.h
> @@ -36,6 +36,9 @@ struct xe_device {
>  	/** @gt_list: gt info */
>  	struct drm_xe_query_gt_list *gt_list;
>  
> +	/** @gt_mask: bitmask of GT IDs */
> +	uint64_t gt_mask;
> +
>  	/** @memory_regions: bitmask of all memory regions */
>  	uint64_t memory_regions;
>  
> -- 
> 2.49.0
> 

LGTM,

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>

--
Zbigniew