[PATCH i-g-t v2 7/7] tests/xe: Don't assume max GT ID is num_gt - 1

[Zbigniew Kempczyński]

On Wed, Jul 02, 2025 at 12:33:02PM -0700, Matt Roper wrote:
> On future platforms GT IDs may not be consecutive.  The GT mask should
> be consulted when determining whether a GT is valid, and the maximum GT
> ID (not the GT count) should be used when allocating array storage space
> for GTs.
> 
> v2:
>  - Correct xe_compute handling; we need to loop over GTs without already
>    having a driver fd open (and without holding one over the loop since
>    that will break the semantics of adjusting ccs_mode), so the usual GT
>    iterator isn't suitable for this special case.
> 
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>

--
Zbigniew

> ---
>  tests/intel/xe_compute.c | 40 ++++++++++++++++++++++++++++++++--------
>  tests/intel/xe_gt_freq.c |  8 ++++----
>  2 files changed, 36 insertions(+), 12 deletions(-)
> 
> diff --git a/tests/intel/xe_compute.c b/tests/intel/xe_compute.c
> index 955edf082..5e9140902 100644
> --- a/tests/intel/xe_compute.c
> +++ b/tests/intel/xe_compute.c
> @@ -41,6 +41,21 @@ static bool get_num_cslices(u32 gt, u32 *num_slices)
>  	return ret > 0;
>  }
>  
> +/* Grab GT mask in places where we don't have or want to maintain an open fd */
> +static uint64_t get_gt_mask(void)
> +{
> +	int fd = drm_open_driver(DRIVER_XE);
> +	uint64_t mask;
> +
> +	mask = xe_device_get(fd)->gt_mask;
> +	drm_close_driver(fd);
> +
> +	return mask;
> +}
> +
> +#define for_each_bit(__mask, __bit) \
> +	for ( ; __bit = ffsll(__mask) - 1, __mask != 0; __mask &= ~(1ull << __bit))
> +
>  /**
>   * SUBTEST: ccs-mode-basic
>   * GPU requirement: PVC
> @@ -48,13 +63,18 @@ static bool get_num_cslices(u32 gt, u32 *num_slices)
>   * Functionality: ccs mode
>   */
>  static void
> -test_ccs_mode(int num_gt)
> +test_ccs_mode(void)
>  {
>  	struct drm_xe_engine_class_instance *hwe;
>  	u32 gt, m, ccs_mode, vm, q, num_slices;
>  	int fd, gt_fd, num_gt_with_ccs_mode = 0;
> +	uint64_t gt_mask = get_gt_mask();
>  
> -	for (gt = 0; gt < num_gt; gt++) {
> +	/*
> +	 * The loop body needs to run without any open file descriptors so we
> +	 * can't use xe_for_each_gt() which uses an open fd.
> +	 */
> +	for_each_bit(gt_mask, gt) {
>  		if (!get_num_cslices(gt, &num_slices))
>  			continue;
>  
> @@ -119,13 +139,18 @@ test_ccs_mode(int num_gt)
>   * Functionality: ccs mode
>   */
>  static void
> -test_compute_kernel_with_ccs_mode(int num_gt)
> +test_compute_kernel_with_ccs_mode(void)
>  {
>  	struct drm_xe_engine_class_instance *hwe;
>  	u32 gt, m, num_slices;
>  	int fd, gt_fd, num_gt_with_ccs_mode = 0;
> +	uint64_t gt_mask = get_gt_mask();
>  
> -	for (gt = 0; gt < num_gt; gt++) {
> +	/*
> +	 * The loop body needs to run without any open file descriptors so we
> +	 * can't use xe_for_each_gt() which uses an open fd.
> +	 */
> +	for_each_bit(gt_mask, gt) {
>  		if (!get_num_cslices(gt, &num_slices))
>  			continue;
>  
> @@ -180,11 +205,10 @@ test_compute_square(int fd)
>  
>  igt_main
>  {
> -	int xe, num_gt;
> +	int xe;
>  
>  	igt_fixture {
>  		xe = drm_open_driver(DRIVER_XE);
> -		num_gt = xe_number_gt(xe);
>  	}
>  
>  	igt_subtest("compute-square")
> @@ -195,8 +219,8 @@ igt_main
>  
>  	/* ccs mode tests should be run without open gpu file handles */
>  	igt_subtest("ccs-mode-basic")
> -		test_ccs_mode(num_gt);
> +		test_ccs_mode();
>  
>  	igt_subtest("ccs-mode-compute-kernel")
> -		test_compute_kernel_with_ccs_mode(num_gt);
> +		test_compute_kernel_with_ccs_mode();
>  }
> diff --git a/tests/intel/xe_gt_freq.c b/tests/intel/xe_gt_freq.c
> index 689e0296a..2c9080428 100644
> --- a/tests/intel/xe_gt_freq.c
> +++ b/tests/intel/xe_gt_freq.c
> @@ -399,17 +399,17 @@ igt_main
>  	int gt;
>  	struct drm_xe_engine_class_instance *hwe;
>  	uint32_t *stash_min, *stash_max;
> -	int num_gts;
> +	int max_gt;
>  
>  	igt_fixture {
>  		fd = drm_open_driver(DRIVER_XE);
>  
>  		igt_require(xe_sysfs_gt_has_node(fd, 0, "freq0"));
> -		num_gts = xe_number_gt(fd);
> +		max_gt = xe_dev_max_gt(fd);
>  
>  		/* The defaults are the same. Stashing the gt0 is enough */
> -		stash_min = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
> -		stash_max = (uint32_t *) malloc(sizeof(uint32_t) * num_gts);
> +		stash_min = (uint32_t *) malloc(sizeof(uint32_t) * max_gt);
> +		stash_max = (uint32_t *) malloc(sizeof(uint32_t) * max_gt);
>  
>  		xe_for_each_gt(fd, gt) {
>  			stash_min[gt] = xe_gt_get_freq(fd, gt, "min");
> -- 
> 2.49.0
>