[PATCH i-g-t 4/4] lib/amdgpu: Use available_rings mask for user queues
Jesse.Zhang
Jesse.Zhang at amd.com
Tue Jul 8 07:47:50 UTC 2025
This patch modifies ring selection logic to properly handle user queues by
calculating an available_rings mask based on num_userq_slots when user_queue
is true, otherwise falling back to hw_ip_info.available_rings.
Changes include:
- Added available_rings variable in all command submission helpers
- Calculated mask as ((1 << num_userq_slots) - 1) for user queues
- Used available_rings for ring iteration instead of direct hw_ip_info access
- Applied consistent logic across:
* amd_command_submission_write_linear_helper
* amd_command_submission_const_fill_helper
* amd_command_submission_copy_linear_helper
* amd_compute.c (nop submission)
* amd_deadlock_helpers.c
This ensures correct ring selection behavior for both kernel queue and user queue cases.
Signed-off-by: Jesse Zhang <Jesse.Zhang at amd.com>
---
lib/amdgpu/amd_command_submission.c | 19 ++++++++++++-------
lib/amdgpu/amd_compute.c | 7 +++++--
lib/amdgpu/amd_deadlock_helpers.c | 6 ++++--
3 files changed, 21 insertions(+), 11 deletions(-)
diff --git a/lib/amdgpu/amd_command_submission.c b/lib/amdgpu/amd_command_submission.c
index 0279b22c8..8b7236383 100644
--- a/lib/amdgpu/amd_command_submission.c
+++ b/lib/amdgpu/amd_command_submission.c
@@ -353,6 +353,7 @@ void amdgpu_command_submission_write_linear_helper(amdgpu_device_handle device,
int i, r, loop, ring_id;
uint64_t gtt_flags[2] = {0, AMDGPU_GEM_CREATE_CPU_GTT_USWC};
+ uint32_t available_rings = 0;
ring_context = calloc(1, sizeof(*ring_context));
igt_assert(ring_context);
@@ -368,7 +369,8 @@ void amdgpu_command_submission_write_linear_helper(amdgpu_device_handle device,
r = amdgpu_query_hw_ip_info(device, ip_block->type, 0, &ring_context->hw_ip_info);
igt_assert_eq(r, 0);
-
+ available_rings = user_queue ? ((1 << ring_context->hw_ip_info.num_userq_slots) -1) :
+ ring_context->hw_ip_info.available_rings;
for (i = 0; secure && (i < 2); i++)
gtt_flags[i] |= AMDGPU_GEM_CREATE_ENCRYPTED;
@@ -381,8 +383,7 @@ void amdgpu_command_submission_write_linear_helper(amdgpu_device_handle device,
-/* Dont need but check with vitaly if for KMS also we need ring id or not */
- for (ring_id = 0; (1 << ring_id) & ring_context->hw_ip_info.available_rings; ring_id++) {
+ for (ring_id = 0; (1 << ring_id) & available_rings; ring_id++) {
loop = 0;
ring_context->ring_id = ring_id;
while (loop < 2) {
@@ -481,7 +482,7 @@ void amdgpu_command_submission_const_fill_helper(amdgpu_device_handle device,
struct amdgpu_ring_context *ring_context;
int r, loop, ring_id;
-
+ uint32_t available_rings = 0;
uint64_t gtt_flags[2] = {0, AMDGPU_GEM_CREATE_CPU_GTT_USWC};
ring_context = calloc(1, sizeof(*ring_context));
@@ -495,6 +496,8 @@ void amdgpu_command_submission_const_fill_helper(amdgpu_device_handle device,
igt_assert(ring_context->pm4);
r = amdgpu_query_hw_ip_info(device, ip_block->type, 0, &ring_context->hw_ip_info);
igt_assert_eq(r, 0);
+ available_rings = user_queue ? ((1 << ring_context->hw_ip_info.num_userq_slots) -1) :
+ ring_context->hw_ip_info.available_rings;
if (user_queue) {
ip_block->funcs->userq_create(device, ring_context, ip_block->type);
@@ -503,7 +506,7 @@ void amdgpu_command_submission_const_fill_helper(amdgpu_device_handle device,
igt_assert_eq(r, 0);
}
- for (ring_id = 0; (1 << ring_id) & ring_context->hw_ip_info.available_rings; ring_id++) {
+ for (ring_id = 0; (1 << ring_id) & available_rings; ring_id++) {
/* prepare resource */
loop = 0;
ring_context->ring_id = ring_id;
@@ -575,7 +578,7 @@ void amdgpu_command_submission_copy_linear_helper(amdgpu_device_handle device,
struct amdgpu_ring_context *ring_context;
int r, loop1, loop2, ring_id;
-
+ uint32_t available_rings = 0;
uint64_t gtt_flags[2] = {0, AMDGPU_GEM_CREATE_CPU_GTT_USWC};
@@ -590,6 +593,8 @@ void amdgpu_command_submission_copy_linear_helper(amdgpu_device_handle device,
igt_assert(ring_context->pm4);
r = amdgpu_query_hw_ip_info(device, ip_block->type, 0, &ring_context->hw_ip_info);
igt_assert_eq(r, 0);
+ available_rings = user_queue ? ((1 << ring_context->hw_ip_info.num_userq_slots) -1) :
+ ring_context->hw_ip_info.available_rings;
if (user_queue) {
@@ -599,7 +604,7 @@ void amdgpu_command_submission_copy_linear_helper(amdgpu_device_handle device,
igt_assert_eq(r, 0);
}
- for (ring_id = 0; (1 << ring_id) & ring_context->hw_ip_info.available_rings; ring_id++) {
+ for (ring_id = 0; (1 << ring_id) & available_rings; ring_id++) {
loop1 = loop2 = 0;
ring_context->ring_id = ring_id;
/* run 9 circle to test all mapping combination */
diff --git a/lib/amdgpu/amd_compute.c b/lib/amdgpu/amd_compute.c
index d92b99a76..bc9f77d34 100644
--- a/lib/amdgpu/amd_compute.c
+++ b/lib/amdgpu/amd_compute.c
@@ -47,7 +47,7 @@ void amdgpu_command_submission_nop(amdgpu_device_handle device, enum amd_ip_bloc
int r, instance;
amdgpu_bo_list_handle bo_list;
amdgpu_va_handle va_handle;
-
+ uint32_t available_rings = 0;
struct amdgpu_ring_context *ring_context;
ip_block = get_ip_block(device, type);
@@ -57,6 +57,9 @@ void amdgpu_command_submission_nop(amdgpu_device_handle device, enum amd_ip_bloc
r = amdgpu_query_hw_ip_info(device, type, 0, &ring_context->hw_ip_info);
igt_assert_eq(r, 0);
+ available_rings = user_queue ? ((1 << ring_context->hw_ip_info.num_userq_slots) -1) :
+ ring_context->hw_ip_info.available_rings;
+
if (user_queue) {
ip_block->funcs->userq_create(device, ring_context, type);
} else {
@@ -64,7 +67,7 @@ void amdgpu_command_submission_nop(amdgpu_device_handle device, enum amd_ip_bloc
igt_assert_eq(r, 0);
}
- for (instance = 0; ring_context->hw_ip_info.available_rings & (1 << instance); instance++) {
+ for (instance = 0; available_rings & (1 << instance); instance++) {
r = amdgpu_bo_alloc_and_map_sync(device, 4096, 4096,
AMDGPU_GEM_DOMAIN_GTT, 0,
AMDGPU_VM_MTYPE_UC,
diff --git a/lib/amdgpu/amd_deadlock_helpers.c b/lib/amdgpu/amd_deadlock_helpers.c
index 1ed407332..49582b6c9 100644
--- a/lib/amdgpu/amd_deadlock_helpers.c
+++ b/lib/amdgpu/amd_deadlock_helpers.c
@@ -457,10 +457,12 @@ void bad_access_ring_helper(amdgpu_device_handle device_handle, unsigned int cmd
uint32_t prio;
char sysfs[125];
bool support_page;
-
+ uint32_t available_rings = 0;
r = amdgpu_query_hw_ip_info(device_handle, ip_type, 0, &info);
igt_assert_eq(r, 0);
- if (!info.available_rings)
+
+ available_rings = user_queue ? ((1 << info.num_userq_slots) -1) : info.available_rings;
+ if (!available_rings)
igt_info("SKIP ... as there's no ring for ip %d\n", ip_type);
if (user_queue) {
--
2.49.0
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