[PATCH i-g-t] tests/intel/xe_*: Apply NEEDS_VISIBLE_VRAM in remaining affected tests
Dandamudi, Priyanka
priyanka.dandamudi at intel.com
Tue Jul 22 04:03:56 UTC 2025
> -----Original Message-----
> From: igt-dev <igt-dev-bounces at lists.freedesktop.org> On Behalf Of Lukasz
> Laguna
> Sent: 21 July 2025 02:57 PM
> To: igt-dev at lists.freedesktop.org
> Cc: Konieczny, Kamil <kamil.konieczny at intel.com>; Laguna, Lukasz
> <lukasz.laguna at intel.com>
> Subject: [PATCH i-g-t] tests/intel/xe_*: Apply NEEDS_VISIBLE_VRAM in
> remaining affected tests
>
> Extend the fix from commit b9a5a4d03955 ("tests/intel/xe_*: Use
> NEEDS_VISIBLE_VRAM flag where it's missing") to additional tests that were
> missed earlier.
>
> Signed-off-by: Lukasz Laguna <lukasz.laguna at intel.com>
> ---
> tests/intel/xe_drm_fdinfo.c | 3 ++-
> tests/intel/xe_exec_compute_mode.c | 6 ++++--
> tests/intel/xe_spin_batch.c | 12 ++++++++----
> tests/intel/xe_sysfs_preempt_timeout.c | 6 ++++--
> tests/intel/xe_waitfence.c | 3 ++-
> 5 files changed, 20 insertions(+), 10 deletions(-)
>
> diff --git a/tests/intel/xe_drm_fdinfo.c b/tests/intel/xe_drm_fdinfo.c index
> 17f66f1de..264380d99 100644
> --- a/tests/intel/xe_drm_fdinfo.c
> +++ b/tests/intel/xe_drm_fdinfo.c
> @@ -158,7 +158,8 @@ static void mem_active(int fd, struct drm_xe_engine
> *engine)
> igt_assert_f(ret != 0, "failed with err:%d\n", errno);
> pre_size = info.region_mem[memregion->instance + 1].active;
>
> - bo = xe_bo_create(fd, vm, bo_size, region, 0);
> + bo = xe_bo_create(fd, vm, bo_size, region,
> +
> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> data = xe_bo_map(fd, bo, bo_size);
>
> for (i = 0; i < N_EXEC_QUEUES; i++) { diff --git
> a/tests/intel/xe_exec_compute_mode.c
> b/tests/intel/xe_exec_compute_mode.c
> index f321e1d76..b904dc76b 100644
> --- a/tests/intel/xe_exec_compute_mode.c
> +++ b/tests/intel/xe_exec_compute_mode.c
> @@ -367,7 +367,8 @@ static void non_block(int fd, int expect)
> bo_size = xe_bb_size(fd, bo_size);
>
> engine = xe_engine(fd, 1);
> - bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, engine-
> >instance.gt_id), 0);
> + bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, engine-
> >instance.gt_id),
> +
> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
>
> data = xe_bo_map(fd, bo, bo_size);
> memset(data, 0, bo_size);
> @@ -464,7 +465,8 @@ static void lr_mode_workload(int fd)
> engine = xe_find_engine_by_class(fd,
> DRM_XE_ENGINE_CLASS_COPY);
> igt_assert(engine);
>
> - bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, engine-
> >instance.gt_id), 0);
> + bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, engine-
> >instance.gt_id),
> +
> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> spin = xe_bo_map(fd, bo, bo_size);
>
> exec_queue = xe_exec_queue_create(fd, vm, &engine->instance, 0);
> diff --git a/tests/intel/xe_spin_batch.c b/tests/intel/xe_spin_batch.c index
> 48a888e35..ee2d0ec3f 100644
> --- a/tests/intel/xe_spin_batch.c
> +++ b/tests/intel/xe_spin_batch.c
> @@ -276,7 +276,8 @@ static void xe_spin_fixed_duration(int fd, int gt, int
> class, int flags)
> exec_queue = xe_exec_queue_create(fd, vm, hwe, ext);
> ahnd = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_RELOC);
> bo_size = xe_bb_size(fd, sizeof(*spin));
> - bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, 0), 0);
> + bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, 0),
> +
> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> spin = xe_bo_map(fd, bo, bo_size);
> spin_addr = intel_allocator_alloc_with_strategy(ahnd, bo, bo_size, 0,
>
> ALLOC_STRATEGY_LOW_TO_HIGH);
> @@ -347,8 +348,10 @@ static void xe_spin_mem_copy_region(int fd, struct
> drm_xe_engine_class_instance
> ALLOC_STRATEGY_LOW_TO_HIGH,
> 0);
>
> /* Create source and destination objects used for the copy */
> - src_handle = xe_bo_create(fd, 0, copy_size, region, 0);
> - dst_handle = xe_bo_create(fd, 0, copy_size, region, 0);
> + src_handle = xe_bo_create(fd, 0, copy_size, region,
> +
> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> + dst_handle = xe_bo_create(fd, 0, copy_size, region,
> +
> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> blt_set_mem_object(mem_copy.src, src_handle, copy_size, width,
> width, height, region,
> intel_get_uc_mocs_index(fd), DEFAULT_PAT_INDEX,
> COMPRESSION_DISABLED);
> blt_set_mem_object(mem_copy.dst, dst_handle, copy_size, width,
> width, height, region, @@ -361,7 +364,8 @@ static void
> xe_spin_mem_copy_region(int fd, struct drm_xe_engine_class_instance
> mem_copy.dst->size, 0,
> mem_copy.dst->pat_index);
>
> /* Create spinner */
> - bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, 0), 0);
> + bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, 0),
> +
> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> spin = xe_bo_map(fd, bo, bo_size);
> spin_addr = intel_allocator_alloc_with_strategy(ahnd, bo, bo_size, 0,
>
> ALLOC_STRATEGY_LOW_TO_HIGH);
> diff --git a/tests/intel/xe_sysfs_preempt_timeout.c
> b/tests/intel/xe_sysfs_preempt_timeout.c
> index 139f68d22..ff58c4d49 100644
> --- a/tests/intel/xe_sysfs_preempt_timeout.c
> +++ b/tests/intel/xe_sysfs_preempt_timeout.c
> @@ -86,7 +86,8 @@ static uint64_t __test_timeout(int fd, int engine,
> unsigned int timeout, uint16_
> exec_queues[1] = xe_exec_queue_create(fd, vm[1], hwe,
> to_user_pointer(&ext));
> ahnd[0] = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_RELOC);
> bo_size = xe_bb_size(fd, sizeof(*spin));
> - bo[0] = xe_bo_create(fd, vm[0], bo_size, vram_if_possible(fd, 0), 0);
> + bo[0] = xe_bo_create(fd, vm[0], bo_size, vram_if_possible(fd, 0),
> +
> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> spin[0] = xe_bo_map(fd, bo[0], bo_size);
> xe_vm_bind_async(fd, vm[0], 0, bo[0], 0, addr1, bo_size, &sync, 1);
> xe_spin_init_opts(spin[0], .addr = addr1, @@ -98,7 +99,8 @@ static
> uint64_t __test_timeout(int fd, int engine, unsigned int timeout, uint16_
>
> igt_nsec_elapsed(&ts);
> ahnd[1] = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_RELOC);
> - bo[1] = xe_bo_create(fd, vm[1], bo_size, vram_if_possible(fd, 0), 0);
> + bo[1] = xe_bo_create(fd, vm[1], bo_size, vram_if_possible(fd, 0),
> +
> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> spin[1] = xe_bo_map(fd, bo[1], bo_size);
> xe_vm_bind_sync(fd, vm[1], bo[1], 0, addr2, bo_size);
> xe_spin_init_opts(spin[1], .addr = addr2); diff --git
> a/tests/intel/xe_waitfence.c b/tests/intel/xe_waitfence.c index
> 48076ddeb..5fcd4fc74 100644
> --- a/tests/intel/xe_waitfence.c
> +++ b/tests/intel/xe_waitfence.c
> @@ -238,7 +238,8 @@ exec_queue_reset_wait(int fd)
> };
>
> bb_size = xe_bb_size(fd, 0x40000);
> - bo = xe_bo_create(fd, vm, bb_size, vram_if_possible(fd, 0), 0);
> + bo = xe_bo_create(fd, vm, bb_size, vram_if_possible(fd, 0),
> +
> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> data = xe_bo_map(fd, bo, bb_size);
>
> batch_offset = (char *)&data[0].batch - (char *)data;
> --
LGTM
Reviewed-by: Priyanka Dandamudi <priyanka.dandamudi at intel.com>
> 2.40.0
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