[PATCH i-g-t] tests/amdgpu: Add multi-GPU command submission tests with UMQ

[Jesse.Zhang]

From: "Jesse.zhang" <Jesse.zhang at amd.com>

Add new subtests to verify command submission across multiple GPUs
using User Mode Queues (UMQ) for different IP blocks:

1. multi-gpu-cs-gfx-with-IP-GFX-UMQ: Tests GFX command submission
2. multi-gpu-cs-compute-with-IP-COMPUTE-UMQ: Tests COMPUTE command submission
3. multi-gpu-cs-sdma-with-IP-DMA-UMQ: Tests SDMA command submission

Each test:
- Iterates through all AMDGPU devices using igt_multi_fork_foreach_gpu
- Initializes the device and queries GPU info
- Sets up IP blocks and checks UMQ capabilities
- Runs the appropriate command submission test if UMQ is supported
- Includes proper error handling and device cleanup

The tests help validate multi-GPU command submission functionality
and UMQ support across different IP blocks in a multi-GPU system.

Signed-off-by: Jesse Zhang <Jesse.Zhang at amd.com>
---
 tests/amdgpu/amd_basic.c | 90 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 90 insertions(+)

diff --git a/tests/amdgpu/amd_basic.c b/tests/amdgpu/amd_basic.c
index 66f6d45e7..c524e1141 100644
--- a/tests/amdgpu/amd_basic.c
+++ b/tests/amdgpu/amd_basic.c
@@ -13,6 +13,8 @@
 #include "lib/amdgpu/amd_gfx.h"
 #include "lib/amdgpu/amd_shaders.h"
 #include "lib/amdgpu/amd_dispatch.h"
+#include "igt.h"
+#include "igt_multigpu.h"
 
 #define BUFFER_SIZE (8 * 1024)
 
@@ -859,6 +861,94 @@ igt_main
 		}
 	}
 
+	igt_subtest("multi-gpu-cs-gfx-with-IP-GFX-UMQ") {
+		igt_multi_fork_foreach_gpu(gpu_fd, gpu_idx, DRIVER_AMDGPU) {
+			amdgpu_device_handle dev;
+			uint32_t major, minor;
+			struct amdgpu_gpu_info gpus_info = {0};
+			bool userq_arr_caps[AMD_IP_MAX] = {0};
+			int res;
+
+			/* Initialize device */
+			res = amdgpu_device_initialize(gpu_fd, &major, &minor, &dev);
+			igt_assert_eq(res, 0);
+
+			res = amdgpu_query_gpu_info(dev, &gpus_info);
+			igt_assert_eq(res, 0);
+
+			res = setup_amdgpu_ip_blocks(major, minor, &gpus_info, dev);
+			igt_assert_eq(res, 0);
+			asic_userq_readiness(device, userq_arr_caps);
+			/* Run test */
+			if (enable_test && userq_arr_caps[AMD_IP_GFX])
+				amdgpu_command_submission_gfx(dev, false, true);
+			amdgpu_device_deinitialize(dev);
+		}
+		igt_waitchildren();
+	}
+
+	igt_subtest("multi-gpu-cs-compute-with-IP-COMPUTE-UMQ") {
+		igt_multi_fork_foreach_gpu(gpu_fd, gpu_idx, DRIVER_AMDGPU) {
+			amdgpu_device_handle dev;
+			uint32_t major, minor;
+			struct amdgpu_gpu_info gpus_info = {0};
+			bool userq_arr_caps[AMD_IP_MAX] = {0};
+			int res;
+
+			if (gpu_fd < 0) {
+				igt_warn("Invalid FD for GPU %d\n", gpu_idx);
+				continue;
+			}
+
+			/* Initialize device */
+			res = amdgpu_device_initialize(gpu_fd, &major, &minor, &dev);
+			if (res != 0) {
+				igt_warn("Failed to initialize GPU %d (error %d)\n", gpu_idx, res);
+				continue;
+			}
+			//res = amdgpu_device_initialize(gpu_fd, &major, &minor, &devices);
+			//igt_assert_eq(res, 0);
+
+			res = amdgpu_query_gpu_info(dev, &gpus_info);
+			igt_assert_eq(res, 0);
+
+			res = setup_amdgpu_ip_blocks(major, minor, &gpus_info, dev);
+			igt_assert_eq(res, 0);
+			asic_userq_readiness(device, userq_arr_caps);
+			/* Run test */
+			if (enable_test && userq_arr_caps[AMD_IP_COMPUTE])
+				amdgpu_command_submission_compute(dev, true);
+			amdgpu_device_deinitialize(dev);
+		}
+		igt_waitchildren();
+	}
+
+	igt_subtest("multi-gpu-cs-sdma-with-IP-DMA-UMQ") {
+		igt_multi_fork_foreach_gpu(gpu_fd, gpu_idx, DRIVER_AMDGPU) {
+			amdgpu_device_handle dev;
+			uint32_t major, minor;
+			struct amdgpu_gpu_info gpus_info = {0};
+			bool userq_arr_caps[AMD_IP_MAX] = {0};
+			int res;
+
+			/* Initialize device */
+			res = amdgpu_device_initialize(gpu_fd, &major, &minor, &dev);
+			igt_assert_eq(res, 0);
+
+			res = amdgpu_query_gpu_info(dev, &gpus_info);
+			igt_assert_eq(res, 0);
+
+			res = setup_amdgpu_ip_blocks(major, minor, &gpus_info, dev);
+			igt_assert_eq(res, 0);
+			asic_userq_readiness(dev, userq_arr_caps);
+			/* Run test */
+			if (enable_test && userq_arr_caps[AMD_IP_DMA])
+				amdgpu_command_submission_sdma(dev, true);
+			amdgpu_device_deinitialize(dev);
+		}
+		igt_waitchildren();
+	}
+
 	igt_fixture {
 		amdgpu_device_deinitialize(device);
 		drm_close_driver(fd);
-- 
2.49.0