[PATCH v2 i-g-t 1/2] xe/oa: Update scripts to support PTL

[Ashutosh Dixit]

From: Sushma Venkatesh Reddy <sushma.venkatesh.reddy at intel.com>

v2 (Ashutosh):
- Remove xe3_chipset_params_pec and xe3_chipset_oa_formats, use
  xe2_chipset_oa_formats
- Move generated changes to guids.xml to next patch
- Add PTL to intel_xe_perf_for_devinfo

Signed-off-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy at intel.com>
---
 lib/meson.build                           | 1 +
 lib/xe/oa-configs/mdapi-xml-convert.py    | 1 +
 lib/xe/oa-configs/oa-metricset-codegen.py | 2 +-
 lib/xe/oa-configs/oa_guid_registry.py     | 1 +
 lib/xe/oa-configs/update-guids.py         | 1 +
 lib/xe/xe_oa.c                            | 3 +++
 6 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/lib/meson.build b/lib/meson.build
index dda30e4bdb..ff81baae13 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -443,6 +443,7 @@ xe_oa_hardware = [
   'mtlgt2', 'mtlgt3',
   'lnl',
   'bmg',
+  'ptl',
 ]
 
 xe_xml_files = []
diff --git a/lib/xe/oa-configs/mdapi-xml-convert.py b/lib/xe/oa-configs/mdapi-xml-convert.py
index df6ab3f9cb..9abc7e5292 100755
--- a/lib/xe/oa-configs/mdapi-xml-convert.py
+++ b/lib/xe/oa-configs/mdapi-xml-convert.py
@@ -208,6 +208,7 @@ chipsets = {
     'MTL': mtl_chipset_oa_formats,
     'LNL': xe2_chipset_oa_formats,
     'BMG': xe2_chipset_oa_formats,
+    'PTL': xe2_chipset_oa_formats,
 }
 
 xehp_plus = ( 'ACM', 'MTL' )
diff --git a/lib/xe/oa-configs/oa-metricset-codegen.py b/lib/xe/oa-configs/oa-metricset-codegen.py
index 8816c0893f..748f587875 100644
--- a/lib/xe/oa-configs/oa-metricset-codegen.py
+++ b/lib/xe/oa-configs/oa-metricset-codegen.py
@@ -138,7 +138,7 @@ def generate_metric_sets(args, gen):
                     metric_set->c_offset = metric_set->b_offset + 8;
                     metric_set->perfcnt_offset = metric_set->c_offset + 8;
                 """))
-        elif gen.chipset == "lnl" or gen.chipset == "bmg":
+        elif gen.chipset == "lnl" or gen.chipset == "bmg" or gen.chipset == "ptl":
             c(textwrap.dedent("""\
                 metric_set->perf_oa_format = XE_OA_FORMAT_PEC64u64;
 
diff --git a/lib/xe/oa-configs/oa_guid_registry.py b/lib/xe/oa-configs/oa_guid_registry.py
index 4b07faf59c..55c4968161 100644
--- a/lib/xe/oa-configs/oa_guid_registry.py
+++ b/lib/xe/oa-configs/oa_guid_registry.py
@@ -103,6 +103,7 @@ class Registry:
                            'MTL',
                            'LNL',
                            'BMG',
+                           'PTL',
                           )
         if name in known_chipsets:
             return name
diff --git a/lib/xe/oa-configs/update-guids.py b/lib/xe/oa-configs/update-guids.py
index 5a099a1587..c3f5a37c6e 100755
--- a/lib/xe/oa-configs/update-guids.py
+++ b/lib/xe/oa-configs/update-guids.py
@@ -167,6 +167,7 @@ chipsets = [ 'hsw',
              'mtlgt2', 'mtlgt3',
              'lnl',
              'bmg',
+             'ptl',
 ]
 
 for chipset in chipsets:
diff --git a/lib/xe/xe_oa.c b/lib/xe/xe_oa.c
index db614b7322..428e7d0a29 100644
--- a/lib/xe/xe_oa.c
+++ b/lib/xe/xe_oa.c
@@ -39,6 +39,7 @@
 #include "xe_oa_metrics_pvc.h"
 #include "xe_oa_metrics_lnl.h"
 #include "xe_oa_metrics_bmg.h"
+#include "xe_oa_metrics_ptl.h"
 
 static struct intel_xe_perf_logical_counter_group *
 intel_xe_perf_logical_counter_group_new(struct intel_xe_perf *perf,
@@ -300,6 +301,8 @@ intel_xe_perf_for_devinfo(uint32_t device_id,
 		intel_xe_perf_load_metrics_lnl(perf);
 	} else if (devinfo->is_battlemage) {
 		intel_xe_perf_load_metrics_bmg(perf);
+	} else if (devinfo->is_pantherlake) {
+		intel_xe_perf_load_metrics_ptl(perf);
 	} else if (intel_graphics_ver(device_id) >= IP_VER(20, 0)) {
 		intel_xe_perf_load_metrics_lnl(perf);
 	} else {
-- 
2.48.1