[PATCH] tests/amdgpu: add environment variable to enable tests

[vitaly prosyak]

Reviewed-by: Vitaly Prosyak <vitaly.prosyak at amd.com>

On 2025-06-10 02:37, Sunil Khatri wrote:
> Some of the upstream tests are not 100% stable yet
> so keeping them disabled by default and developer
> can run these using the environment variable
> AMDGPU_DISABLE_USERQTEST.
>
> Signed-off-by: Sunil Khatri <sunil.khatri at amd.com>
> ---
>  tests/amdgpu/amd_cs_nop.c   |  9 +++++++--
>  tests/amdgpu/amd_deadlock.c | 22 ++++++++++++++--------
>  tests/amdgpu/amd_security.c | 32 +++++++++++++++++++-------------
>  3 files changed, 40 insertions(+), 23 deletions(-)
>
> diff --git a/tests/amdgpu/amd_cs_nop.c b/tests/amdgpu/amd_cs_nop.c
> index eb07a2823..644016d5d 100644
> --- a/tests/amdgpu/amd_cs_nop.c
> +++ b/tests/amdgpu/amd_cs_nop.c
> @@ -167,9 +167,14 @@ igt_main
>  		{ "gfx", AMDGPU_HW_IP_GFX },
>  		{ },
>  	}, *e;
> +
>  	int fd = -1;
>  	bool arr_cap[AMD_IP_MAX] = {0};
>  	bool userq_arr_cap[AMD_IP_MAX] = {0};
> +	bool enable_test;
> +	const char *env = getenv("AMDGPU_DISABLE_USERQTEST");
> +
> +	enable_test = env && atoi(env);
>  
>  	igt_fixture {
>  		uint32_t major, minor;
> @@ -200,7 +205,7 @@ igt_main
>  	}
>  
>  #ifdef AMDGPU_USERQ_ENABLED
> -#ifdef AMDGPU_DISABLE_USERQTEST
> +if (enable_test) {
>  	for (p = phase; p->name; p++) {
>  		for (e = engines; e->name; e++) {
>  			igt_describe("Stressful-and-multiple-cs-of-nop-operations-using-multiple-processes-with-the-same-GPU-context-UMQ");
> @@ -213,7 +218,7 @@ igt_main
>  			}
>  		}
>  	}
> -#endif
> +}
>  #endif
>  
>  	igt_fixture {
> diff --git a/tests/amdgpu/amd_deadlock.c b/tests/amdgpu/amd_deadlock.c
> index b5ae1c5c9..45a864feb 100644
> --- a/tests/amdgpu/amd_deadlock.c
> +++ b/tests/amdgpu/amd_deadlock.c
> @@ -43,6 +43,10 @@ igt_main
>  	bool arr_cap[AMD_IP_MAX] = {0};
>  	bool userq_arr_cap[AMD_IP_MAX] = {0};
>  	struct pci_addr pci;
> +	bool enable_test = false;
> +	const char *env = getenv("AMDGPU_DISABLE_USERQTEST");
> +
> +	enable_test = env && atoi(env);
>  
>  	igt_fixture {
>  		uint32_t major, minor;
> @@ -180,18 +184,20 @@ igt_main
>  		}
>  	}
>  #ifdef AMDGPU_USERQ_ENABLED
> -#ifdef AMDGPU_DISABLE_USERQTEST
> -	igt_describe("Test-GPU-reset-by-access-umq-gfx-illegal-reg");
> -	igt_subtest_with_dynamic("amdgpu-umq-gfx-illegal-reg-access") {
> -		if (userq_arr_cap[AMD_IP_GFX] &&
> -			is_reset_enable(AMD_IP_GFX, AMDGPU_RESET_TYPE_PER_QUEUE, &pci)) {
> -			igt_dynamic_f("amdgpu-umq-illegal-reg-access")
> -			bad_access_ring_helper(device, CMD_STREAM_TRANS_BAD_REG_ADDRESS,
> +	if (enable_test) {
> +		igt_describe("Test-GPU-reset-by-access-umq-gfx-illegal-reg");
> +		igt_subtest_with_dynamic("amdgpu-umq-gfx-illegal-reg-access") {
> +			if (userq_arr_cap[AMD_IP_GFX] &&
> +			    is_reset_enable(AMD_IP_GFX, AMDGPU_RESET_TYPE_PER_QUEUE, &pci)) {
> +				igt_dynamic_f("amdgpu-umq-illegal-reg-access")
> +				bad_access_ring_helper(device,
> +					CMD_STREAM_TRANS_BAD_REG_ADDRESS,
>  					AMDGPU_HW_IP_GFX, &pci, true);
> +			}
>  		}
>  	}
>  #endif
> -#endif
> +
>  	igt_fixture {
>  		amdgpu_device_deinitialize(device);
>  		drm_close_driver(fd);
> diff --git a/tests/amdgpu/amd_security.c b/tests/amdgpu/amd_security.c
> index 79fe0f78e..45bd7e771 100644
> --- a/tests/amdgpu/amd_security.c
> +++ b/tests/amdgpu/amd_security.c
> @@ -316,6 +316,10 @@ igt_main
>  	int r, fd = -1;
>  	bool is_secure = true;
>  	bool userq_arr_cap[AMD_IP_MAX] = {0};
> +	bool enable_test = false;
> +	const char *env = getenv("AMDGPU_DISABLE_USERQTEST");
> +
> +	enable_test = env && atoi(env);
>  
>  	igt_fixture {
>  		uint32_t major, minor;
> @@ -357,19 +361,21 @@ igt_main
>  			AMDGPU_HW_IP_DMA), is_secure);
>  
>  #ifdef AMDGPU_USERQ_ENABLED
> -#ifdef AMDGPU_DISABLE_USERQTEST
> -	igt_describe("amdgpu gfx command submission write linear helper with user queue");
> -	igt_subtest("gfx-write-linear-helper-secure-umq")
> -	if (userq_arr_cap[AMD_IP_GFX])
> -		amdgpu_command_submission_write_linear_helper(device,
> -				get_ip_block(device, AMDGPU_HW_IP_GFX), is_secure, true);
> -
> -	igt_describe("amdgpu compute command submission write linear helper with user queue");
> -	igt_subtest("compute-write-linear-helper-secure-umq")
> -	if (userq_arr_cap[AMD_IP_COMPUTE])
> -		amdgpu_command_submission_write_linear_helper(device,
> -				get_ip_block(device, AMDGPU_HW_IP_COMPUTE), is_secure, true);
> -#endif
> +	if (enable_test) {
> +		igt_describe("amdgpu gfx command submission write linear helper with user queue");
> +		igt_subtest("gfx-write-linear-helper-secure-umq")
> +		if (userq_arr_cap[AMD_IP_GFX])
> +			amdgpu_command_submission_write_linear_helper(device,
> +							get_ip_block(device, AMDGPU_HW_IP_GFX),
> +							is_secure, true);
> +
> +		igt_describe("amdgpu compute command submission write linear helper with user queue");
> +		igt_subtest("compute-write-linear-helper-secure-umq")
> +		if (userq_arr_cap[AMD_IP_COMPUTE])
> +			amdgpu_command_submission_write_linear_helper(device,
> +							get_ip_block(device, AMDGPU_HW_IP_COMPUTE),
> +							is_secure, true);
> +	}
>  #endif
>  
>  	igt_fixture {