[PATCH i-g-t] tests/intel/xe_*: Use NEEDS_VISIBLE_VRAM flag where it's missing

Laguna, Lukasz lukasz.laguna at intel.com
Wed Jun 11 10:52:29 UTC 2025


On 6/11/2025 12:27, Kamil Konieczny wrote:
> Hi Lukasz,
> On 2025-06-11 at 11:57:11 +0200, Lukasz Laguna wrote:
>> Set DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM flag when creating BOs
>> that will be CPU-mapped, to ensure that the corresponding VRAM
>> allocation will use the CPU accessible part of VRAM.
>>
>> This is essential for small-bar systems, where omitting the flag may
>> cause failures or SIGBUS crashes due to the CPU accessing non-visible
>> VRAM.
>>
>> Suggested-by: Matthew Auld <matthew.auld at intel.com>
>> Signed-off-by: Lukasz Laguna <lukasz.laguna at intel.com>
>> ---
>>   tests/intel/xe_exec_atomic.c | 2 +-
>>   tests/intel/xe_pat.c         | 3 ++-
>>   tests/intel/xe_spin_batch.c  | 3 ++-
>>   3 files changed, 5 insertions(+), 3 deletions(-)
>>
>> diff --git a/tests/intel/xe_exec_atomic.c b/tests/intel/xe_exec_atomic.c
>> index 825d7d190..39c739b64 100644
>> --- a/tests/intel/xe_exec_atomic.c
>> +++ b/tests/intel/xe_exec_atomic.c
>> @@ -85,7 +85,7 @@ static void basic_inst(int fd, int inst_type, struct drm_xe_engine_class_instanc
>>   	bo_size = xe_bb_size(fd, bo_size);
>>   
>>   	bo = xe_bo_create(fd, vm, bo_size, placement,
>> -			  I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS);
>> +			  DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> Could you split this into separate patch? imho it looks like a fix.

Hi Kamil,

These are all fixes addressing the same issue - just here the flag is 
incorrect and in other cases it's missing.
But if you still prefer them to be separate, I can split them.

Regards,
Lukasz

>
> Regards,
> Kamil
>
>>   
>>   	exec_queue = xe_exec_queue_create(fd, vm, eci, 0);
>>   	bind_engine = xe_bind_exec_queue_create(fd, vm, 0);
>> diff --git a/tests/intel/xe_pat.c b/tests/intel/xe_pat.c
>> index 88d8de9dd..8bb0ac167 100644
>> --- a/tests/intel/xe_pat.c
>> +++ b/tests/intel/xe_pat.c
>> @@ -582,7 +582,8 @@ static void prime_self_import_coh(void)
>>   	fd1 = drm_open_driver(DRIVER_XE);
>>   	fd2 = drm_open_driver(DRIVER_XE);
>>   
>> -	dst_handle = xe_bo_create_caching(fd1, 0, size, all_memory_regions(fd1), 0,
>> +	dst_handle = xe_bo_create_caching(fd1, 0, size, all_memory_regions(fd1),
>> +					  DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM,
>>   					  DRM_XE_GEM_CPU_CACHING_WC);
>>   
>>   	dma_buf_fd = prime_handle_to_fd(fd1, dst_handle);
>> diff --git a/tests/intel/xe_spin_batch.c b/tests/intel/xe_spin_batch.c
>> index 21b08ba06..48a888e35 100644
>> --- a/tests/intel/xe_spin_batch.c
>> +++ b/tests/intel/xe_spin_batch.c
>> @@ -442,7 +442,8 @@ static void exec_store(int fd, struct drm_xe_engine_class_instance *eci,
>>   	vm = xe_vm_create(fd, 0, 0);
>>   	exec_queue = xe_exec_queue_create(fd, vm, eci, 0);
>>   	bb_size = xe_bb_size(fd, sizeof(*data));
>> -	bb = xe_bo_create(fd, vm, bb_size, vram_if_possible(fd, eci->gt_id), 0);
>> +	bb = xe_bo_create(fd, vm, bb_size, vram_if_possible(fd, eci->gt_id),
>> +			  DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
>>   	bb_addr = intel_allocator_alloc_with_strategy(ahnd, bb, bb_size, 0,
>>   						      ALLOC_STRATEGY_LOW_TO_HIGH);
>>   	data = xe_bo_map(fd, bb, bb_size);
>> -- 
>> 2.40.0
>>


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