[PATCH i-g-t v2] tests/amdgpu: Fix compilation warnings for USERQ

Kamil Konieczny kamil.konieczny at linux.intel.com
Wed Jun 11 17:52:12 UTC 2025


Recent change brings compilation warnings when
AMDGPU_USERQ_ENABLED was defined, for example:

../tests/amdgpu/amd_security.c: In function '__igt_unique____real_main311':
../tests/amdgpu/amd_security.c:319:14: warning: variable 'enable_test' set but not used [-Wunused-but-set-variable]
  319 |         bool enable_test = false;

Fix this and also while at this move setting var into igt_fixture.

Cc: Sunil Khatri <sunil.khatri at amd.com>
Cc: Vitaly Prosyak <vitaly.prosyak at amd.com>
Fixes: dad4b2bb9e5a ("tests/amdgpu: add environment variable to enable tests")
Signed-off-by: Kamil Konieczny <kamil.konieczny at linux.intel.com>
---
 tests/amdgpu/amd_cs_nop.c   | 7 +++++--
 tests/amdgpu/amd_deadlock.c | 8 ++++++--
 tests/amdgpu/amd_security.c | 7 +++++--
 3 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/tests/amdgpu/amd_cs_nop.c b/tests/amdgpu/amd_cs_nop.c
index 644016d5d..9b6410352 100644
--- a/tests/amdgpu/amd_cs_nop.c
+++ b/tests/amdgpu/amd_cs_nop.c
@@ -171,10 +171,10 @@ igt_main
 	int fd = -1;
 	bool arr_cap[AMD_IP_MAX] = {0};
 	bool userq_arr_cap[AMD_IP_MAX] = {0};
+#ifdef AMDGPU_USERQ_ENABLED
 	bool enable_test;
 	const char *env = getenv("AMDGPU_DISABLE_USERQTEST");
-
-	enable_test = env && atoi(env);
+#endif
 
 	igt_fixture {
 		uint32_t major, minor;
@@ -189,6 +189,9 @@ igt_main
 		igt_assert_eq(err, 0);
 		asic_rings_readness(device, 1, arr_cap);
 		asic_userq_readiness(device, userq_arr_cap);
+#ifdef AMDGPU_USERQ_ENABLED
+		enable_test = env && atoi(env);
+#endif
 	}
 
 	for (p = phase; p->name; p++) {
diff --git a/tests/amdgpu/amd_deadlock.c b/tests/amdgpu/amd_deadlock.c
index 45a864feb..4ea2ae8dc 100644
--- a/tests/amdgpu/amd_deadlock.c
+++ b/tests/amdgpu/amd_deadlock.c
@@ -43,10 +43,10 @@ igt_main
 	bool arr_cap[AMD_IP_MAX] = {0};
 	bool userq_arr_cap[AMD_IP_MAX] = {0};
 	struct pci_addr pci;
+#ifdef AMDGPU_USERQ_ENABLED
 	bool enable_test = false;
 	const char *env = getenv("AMDGPU_DISABLE_USERQTEST");
-
-	enable_test = env && atoi(env);
+#endif
 
 	igt_fixture {
 		uint32_t major, minor;
@@ -71,6 +71,10 @@ igt_main
 		igt_skip_on(get_pci_addr_from_fd(fd, &pci));
 		igt_info("PCI Address: domain %04x, bus %02x, device %02x, function %02x\n",
 				pci.domain, pci.bus, pci.device, pci.function);
+#ifdef AMDGPU_USERQ_ENABLED
+		enable_test = env && atoi(env);
+#endif
+
 	}
 	igt_describe("Test-GPU-reset-by-flooding-sdma-ring-with-jobs");
 	igt_subtest_with_dynamic("amdgpu-deadlock-sdma") {
diff --git a/tests/amdgpu/amd_security.c b/tests/amdgpu/amd_security.c
index 45bd7e771..a01e339ca 100644
--- a/tests/amdgpu/amd_security.c
+++ b/tests/amdgpu/amd_security.c
@@ -316,10 +316,10 @@ igt_main
 	int r, fd = -1;
 	bool is_secure = true;
 	bool userq_arr_cap[AMD_IP_MAX] = {0};
+#ifdef AMDGPU_USERQ_ENABLED
 	bool enable_test = false;
 	const char *env = getenv("AMDGPU_DISABLE_USERQTEST");
-
-	enable_test = env && atoi(env);
+#endif
 
 	igt_fixture {
 		uint32_t major, minor;
@@ -338,6 +338,9 @@ igt_main
 		igt_assert_eq(r, 0);
 		asic_userq_readiness(device, userq_arr_cap);
 		igt_skip_on(!is_security_tests_enable(device, &gpu_info, major, minor));
+#ifdef AMDGPU_USERQ_ENABLED
+		enable_test = env && atoi(env);
+#endif
 	}
 
 	igt_describe("amdgpu security alloc buf test");
-- 
2.49.0



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