[PATCH i-g-t 3/3] tests/kms_async_flips: Add DPMS subtest

Murthy, Arun R arun.r.murthy at intel.com
Fri Jun 20 05:41:21 UTC 2025


> -----Original Message-----
> From: B S, Karthik <karthik.b.s at intel.com>
> Sent: Thursday, June 19, 2025 4:54 PM
> To: igt-dev at lists.freedesktop.org
> Cc: Reddy Guddati, Santhosh <santhosh.reddy.guddati at intel.com>; Murthy,
> Arun R <arun.r.murthy at intel.com>; B S, Karthik <karthik.b.s at intel.com>
> Subject: [PATCH i-g-t 3/3] tests/kms_async_flips: Add DPMS subtest
> 
> Test functionality of async flips with DPMS.
> 
> Signed-off-by: Karthik B S <karthik.b.s at intel.com>
> ---
>  tests/kms_async_flips.c | 34 +++++++++++++++++++++++++++++++++-
>  1 file changed, 33 insertions(+), 1 deletion(-)
> 
> diff --git a/tests/kms_async_flips.c b/tests/kms_async_flips.c index
> 8587e4675..b0f96ad95 100644
> --- a/tests/kms_async_flips.c
> +++ b/tests/kms_async_flips.c
> @@ -89,6 +89,9 @@
>   * SUBTEST: async-flip-hang
>   * Description: Verify the async flip functionality with hang cycle
>   *
> + * SUBTEST: async-flip-dpms
> + * Description: Verify the async flip functionality with dpms cycle
> + *
>   * SUBTEST: overlay-atomic
>   * Description: Verify overlay planes with async flips in atomic API
>   *
> @@ -136,6 +139,7 @@ typedef struct {
>  	bool alternate_sync_async;
>  	bool suspend_resume;
>  	bool hang;
> +	bool dpms;
>  	bool allow_fail;
>  	struct buf_ops *bops;
>  	bool atomic_path;
> @@ -375,6 +379,21 @@ static int perform_flip(data_t *data, int frame, int
> flags)
>  	return ret;
>  }
> 
> +static void check_dpms(igt_output_t *output) {
> +	igt_require(igt_setup_runtime_pm(output->display->drm_fd));
> +
> +	kmstest_set_connector_dpms(output->display->drm_fd,
> +				   output->config.connector,
> +				   DRM_MODE_DPMS_OFF);
> +
> 	igt_require(igt_wait_for_pm_status(IGT_RUNTIME_PM_STATUS_SUSPE
> NDED));
> +
> +	kmstest_set_connector_dpms(output->display->drm_fd,
> +				   output->config.connector,
> +				   DRM_MODE_DPMS_ON);
> +
> 	igt_assert(igt_wait_for_pm_status(IGT_RUNTIME_PM_STATUS_ACTIVE)
> );
> +}
> +
>  static void test_async_flip(data_t *data)  {
>  	int ret, frame;
> @@ -383,7 +402,7 @@ static void test_async_flip(data_t *data)
>  	igt_hang_t hang;
>  	uint64_t ahnd = 0;
>  	int mid_time = RUN_TIME / 2;
> -	bool temp = data->suspend_resume || data->hang;
> +	bool temp = data->suspend_resume || data->hang || data->dpms;
> 
>  	igt_display_commit2(&data->display, data->display.is_atomic ?
> COMMIT_ATOMIC : COMMIT_LEGACY);
> 
> @@ -454,6 +473,11 @@ static void test_async_flip(data_t *data)
>  			hang = igt_hang_ring_with_ahnd(data->drm_fd,
> I915_EXEC_DEFAULT, ahnd);
>  		}
> 
> +		if (data->dpms && diff.tv_sec == mid_time && temp) {
> +			temp = false;
> +			check_dpms(data->output);
> +		}
> +
After DPMS cycle the first async flip can consume upto one vblank time. So this delay has to be considered while measuring the performance.

Thanks and Regards,
Arun R Murthy
-------------------
>  		frame++;
>  	} while (diff.tv_sec < RUN_TIME);
> 
> @@ -1063,6 +1087,14 @@ igt_main
>  		data.hang = false;
>  	}
> 
> +	igt_describe("Verify the async flip functionality after dpms cycle");
> +	igt_subtest_with_dynamic("async-flip-dpms") {
> +		test_init_ops(&data);
> +		data.dpms = true;
> +		run_test(&data, test_async_flip);
> +		data.dpms = false;
> +	}
> +
>  	igt_fixture {
>  		for (i = 0; i < NUM_FBS; i++) {
>  			igt_remove_fb(data.drm_fd, &data.bufs[i]);
> --
> 2.43.0



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