[PATCH i-g-t v1] lib/i915/fbc: Disable FBC in case of selective update in xe2lpd

Vinod Govindapillai vinod.govindapillai at intel.com
Thu Mar 20 11:09:08 UTC 2025


In xe2lpd onwards, FBC and PSR2 selective update should be
selectively enabled based on the dirty rect threshold. Display
driver lacks such a logic at the moment and instead disables
FBC in case selective update is on. So replicate the same
in related IGT cases as well.

Signed-off-by: Vinod Govindapillai <vinod.govindapillai at intel.com>
---
 lib/i915/intel_fbc.c | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/lib/i915/intel_fbc.c b/lib/i915/intel_fbc.c
index 3971e4920..b0b4278ad 100644
--- a/lib/i915/intel_fbc.c
+++ b/lib/i915/intel_fbc.c
@@ -167,11 +167,16 @@ bool intel_fbc_plane_size_supported(int fd, uint32_t width, uint32_t height)
  */
 bool intel_fbc_psr_combo_supported(int device)
 {
-	int ver = intel_display_ver(intel_get_drm_devid(device));
-
-	/* In Xe3 FBC PSR combo not supported because of FBC dirty rect */
-	if (ver >= 20 && ver < 30)
-		return true;
+	/*
+	 * Because of some random underruns, FBC is disabled when selective
+	 * update is enabled for xe2lpd onwards. The display driver should
+	 * implement a selection logic between FBC and PSR2 / PR selective
+	 * update from xe2lpd onwards. Until that is implemented, keep
+	 * FBC disabled if PSR2 selective update is on.
+	 *
+	 * Though right now this function is empty, keep this for the future
+	 * display version based variations for FBC and PSR
+	 */
 
 	return false;
 }
-- 
2.43.0



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