[PATCH 3/3] tests/intel/xe_exec_system_allocator: Rebind the prefetch ranges
Ch, Sai Gowtham
sai.gowtham.ch at intel.com
Wed May 14 05:21:43 UTC 2025
>-----Original Message-----
>From: Cavitt, Jonathan <jonathan.cavitt at intel.com>
>Sent: Wednesday, May 14, 2025 4:15 AM
>To: Ch, Sai Gowtham <sai.gowtham.ch at intel.com>; igt-dev at lists.freedesktop.org;
>Ch, Sai Gowtham <sai.gowtham.ch at intel.com>; Ghimiray, Himal Prasad
><himal.prasad.ghimiray at intel.com>; Brost, Matthew <matthew.brost at intel.com>
>Cc: Cavitt, Jonathan <jonathan.cavitt at intel.com>
>Subject: RE: [PATCH 3/3] tests/intel/xe_exec_system_allocator: Rebind the
>prefetch ranges
>
>-----Original Message-----
>From: igt-dev <igt-dev-bounces at lists.freedesktop.org> On Behalf Of
>sai.gowtham.ch at intel.com
>Sent: Tuesday, May 13, 2025 10:07 AM
>To: igt-dev at lists.freedesktop.org; Ch, Sai Gowtham <sai.gowtham.ch at intel.com>;
>Ghimiray, Himal Prasad <himal.prasad.ghimiray at intel.com>; Brost, Matthew
><matthew.brost at intel.com>
>Subject: [PATCH 3/3] tests/intel/xe_exec_system_allocator: Rebind the prefetch
>ranges
>>
>> From: Sai Gowtham Ch <sai.gowtham.ch at intel.com>
>>
>> Test rebinds the prefetch ranges to check the ideal behaviour of
>> prefetch mechanisim,
>
>s/mechanism/mechanism
>
>> expecting address ranges in the corresponding mem regions has to be
>> created again and use those address ranges to submit workloads.
>>
>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray at intel.com>
>> Cc: Matthew Brost <matthew.brost at intel.com>
>> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch at intel.com>
>> ---
>> tests/intel/xe_exec_system_allocator.c | 47
>> +++++++++++++++++++++++---
>> 1 file changed, 42 insertions(+), 5 deletions(-)
>>
>> diff --git a/tests/intel/xe_exec_system_allocator.c
>> b/tests/intel/xe_exec_system_allocator.c
>> index c3f0e61f3..94907847c 100644
>> --- a/tests/intel/xe_exec_system_allocator.c
>> +++ b/tests/intel/xe_exec_system_allocator.c
>> @@ -484,6 +484,24 @@ static void test_basic(int fd, struct
>drm_xe_engine_class_instance *eci,
>> * Description: Prefetch of mutliple ranges within arg[1] size and check if
>multiple ranges are created
>> * Test category: functionality test
>> *
>> + * SUBTEST: bind-vram-%s
>> + * Description: Validate prefetch-smem of size arg[1] by rebinding them with
>prefetch-vram to
>> + * check the behaviour, ideal behaviour is to migrate ranges
>> + * Test category: functionality test
>> + *
>> + * SUBTEST: bind-smem-%s
>> + * Description: Validate prefetch-smem of size arg[1] by rebinding them with
>prefetch-vram
>> + * check the behaviour, ideal behaviour is to migrate ranges
>> + * Test category: functionality test
>> + *
>> + * SUBTEST: multi-range-bind-vram-%s
>> + * Description: Validate multiple ranges of size arg[1] by binding
>> + them with multiple ranges at vram
>> + * Test category: functionality test
>> + *
>> + * SUBTEST: multi-range-bind-smem-%s
>> + * Description: Validate multiple ranges of size arg[1] by binding
>> + them with multiple ranges at smem
>> + * Test category: functionality test
>> + *
>> * arg[1]:
>> *
>> * @SZ_4K: SZ_4K
>> @@ -492,7 +510,7 @@ static void test_basic(int fd, struct
>drm_xe_engine_class_instance *eci,
>> */
>> #define MAX_BATCH_DWORDS 16
>> static void prefetch(int fd, struct drm_xe_engine_class_instance *eci,
>> - size_t bo_size, unsigned int flags, int num_dwords)
>> + size_t bo_size, unsigned int flags, int num_dwords, bool bind)
>
>Rather than adding bind as a boolean flag here, maybe we should add a new flag
>that performs the same job? Since we're borrowing the many_alloc flags section
>anyways, it could maybe be:
>
>"""
>#define VRAM (0x1 << 5)
>#define BIND (0x1 << 6)
>"""
>
>Then, below, instead of checking for the boolean value, we check if "flag & BIND".
>
>Combine this with the advice I gave for the previous patch, and your mode array
>would looks something like:
>
>"""
> const struct mode {
> const char *name;
> unsigned int flags;
> size_t size;
> } mode[] = {
> {"smem-SZ_4K", 0, SZ_4K},
> {"smem-SZ_64K", 0, SZ_64K},
> {"smem-SZ_2M", 0, SZ_2M},
> {"vram-SZ_4K", VRAM, SZ_4K},
> {"vram-SZ_64K", VRAM, SZ_64K},
> {"vram-SZ_2M", VRAM, SZ_2M},
> {"bind-smem-SZ_4K", BIND, SZ_4K},
> {"bind-smem-SZ_64K", BIND, SZ_64K},
> {"bind-smem-SZ_2M", BIND, SZ_2M},
> {"bind-vram-SZ_4K", VRAM | BIND, SZ_4K},
> {"bind-vram-SZ_64K", VRAM | BIND, SZ_64K},
> {"bind-vram-SZ_2M", VRAM | BIND, SZ_2M},
> { NULL },
> };
>"""
>The nice thing about this approach is that it doesn't necessitate changing the
>below list of subtests in the "for each mode" loop, as long as you don't mind
>changing the name of the bind subtests from "bind-.*" to "prefetch-bind-.*".
>-Jonathan Cavitt
>
Thanks for your review comments, Sure will adapt this test to use Bind as a flag.
"prefetch-bind-*" sounds much better.
Thanks,
Gowtham
>> {
>> struct batch_data *data;
>> uint64_t target_addr;
>> @@ -542,6 +560,13 @@ static void prefetch(int fd, struct
>drm_xe_engine_class_instance *eci,
>> sync[0].addr = to_user_pointer(exec_ufence);
>> xe_vm_prefetch_async(fd, vm, 0, 0, addr, bo_size, sync, 1, flags & VRAM ?
>1 : 0);
>> xe_wait_ufence(fd, exec_ufence, USER_FENCE_VALUE, 0,
>NSEC_PER_SEC);
>> + if (bind) {
>> + exec_ufence[0] = 0;
>> + sync[0].addr = to_user_pointer(exec_ufence);
>> + xe_vm_prefetch_async(fd, vm, 0, 0, addr, bo_size, sync, 1, flags &
>VRAM ? 0 : 1);
>> + xe_wait_ufence(fd, exec_ufence, USER_FENCE_VALUE, 0,
>NSEC_PER_SEC);
>> + exec_ufence[0] = 0;
>> + }
>> exec.exec_queue_id = exec_queues;
>>
>> for (int i = 0; i < num_dwords; i++) { @@ -2045,16 +2070,28 @@
>> igt_main
>>
>> for (m = mode; m->name; m++) {
>> igt_subtest_f("prefetch-smem-%s", m->name)
>> - prefetch(fd, &engine->instance, m->size, 0, 1);
>> + prefetch(fd, &engine->instance, m->size, 0, 1, 0);
>>
>> igt_subtest_f("prefetch-vram-%s", m->name)
>> - prefetch(fd, &engine->instance, m->size, VRAM, 1);
>> + prefetch(fd, &engine->instance, m->size, VRAM, 1, 0);
>>
>> igt_subtest_f("multi-range-smem-%s", m->name)
>> - prefetch(fd, &engine->instance, m->size, 0, 10);
>> + prefetch(fd, &engine->instance, m->size, 0, 10, 0);
>>
>> igt_subtest_f("multi-range-vram-%s", m->name)
>> - prefetch(fd, &engine->instance, m->size, VRAM, 10);
>> + prefetch(fd, &engine->instance, m->size, VRAM, 10, 0);
>> +
>> + igt_subtest_f("bind-vram-%s", m->name)
>> + prefetch(fd, &engine->instance, m->size, 0, 1, 1);
>> +
>> + igt_subtest_f("bind-smem-%s", m->name)
>> + prefetch(fd, &engine->instance, m->size, VRAM, 1, 1);
>> +
>> + igt_subtest_f("multi-range-bind-vram-%s", m->name)
>> + prefetch(fd, &engine->instance, m->size, 0, 10, 1);
>> +
>> + igt_subtest_f("multi-range-bind-smem-%s", m->name)
>> + prefetch(fd, &engine->instance, m->size, VRAM, 10, 1);
>> }
>>
>> igt_fixture {
>> --
>> 2.34.1
>>
>>
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