[PATCH 3/3] tests/intel/xe_exec_system_allocator: Rebind the prefetch ranges

Ch, Sai Gowtham sai.gowtham.ch at intel.com
Thu May 15 15:58:30 UTC 2025



>-----Original Message-----
>From: Brost, Matthew <matthew.brost at intel.com>
>Sent: Thursday, May 15, 2025 4:37 AM
>To: Ch, Sai Gowtham <sai.gowtham.ch at intel.com>
>Cc: igt-dev at lists.freedesktop.org; Ghimiray, Himal Prasad
><himal.prasad.ghimiray at intel.com>
>Subject: Re: [PATCH 3/3] tests/intel/xe_exec_system_allocator: Rebind the
>prefetch ranges
>
>On Tue, May 13, 2025 at 05:07:11PM +0000, sai.gowtham.ch at intel.com wrote:
>> From: Sai Gowtham Ch <sai.gowtham.ch at intel.com>
>>
>> Test rebinds the prefetch ranges to check the ideal behaviour of
>> prefetch mechanisim, expecting address ranges in the corresponding mem
>> regions has to be created again and use those address ranges to submit
>workloads.
>>
>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray at intel.com>
>> Cc: Matthew Brost <matthew.brost at intel.com>
>> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch at intel.com>
>> ---
>>  tests/intel/xe_exec_system_allocator.c | 47
>> +++++++++++++++++++++++---
>>  1 file changed, 42 insertions(+), 5 deletions(-)
>>
>> diff --git a/tests/intel/xe_exec_system_allocator.c
>> b/tests/intel/xe_exec_system_allocator.c
>> index c3f0e61f3..94907847c 100644
>> --- a/tests/intel/xe_exec_system_allocator.c
>> +++ b/tests/intel/xe_exec_system_allocator.c
>> @@ -484,6 +484,24 @@ static void test_basic(int fd, struct
>drm_xe_engine_class_instance *eci,
>>   * Description: Prefetch of mutliple ranges within arg[1] size and check if
>multiple ranges are created
>>   * Test category: functionality test
>>   *
>> + * SUBTEST: bind-vram-%s
>> + * Description: Validate prefetch-smem of size arg[1] by rebinding them with
>prefetch-vram to
>> + * 		check the behaviour, ideal behaviour is to migrate ranges
>> + * Test category: functionality test
>> + *
>> + * SUBTEST: bind-smem-%s
>> + * Description: Validate prefetch-smem of size arg[1] by rebinding them with
>prefetch-vram
>> + * 		check the behaviour, ideal behaviour is to migrate ranges
>> + * Test category: functionality test
>> + *
>> + * SUBTEST: multi-range-bind-vram-%s
>> + * Description: Validate multiple ranges of size arg[1] by binding
>> + them with multiple ranges at vram
>> + * Test category: functionality test
>> + *
>> + * SUBTEST: multi-range-bind-smem-%s
>> + * Description: Validate multiple ranges of size arg[1] by binding
>> + them with multiple ranges at smem
>> + * Test category: functionality test
>> + *
>>   * arg[1]:
>>   *
>>   * @SZ_4K: SZ_4K
>> @@ -492,7 +510,7 @@ static void test_basic(int fd, struct
>drm_xe_engine_class_instance *eci,
>>   */
>>  #define MAX_BATCH_DWORDS 16
>>  static void prefetch(int fd, struct drm_xe_engine_class_instance *eci,
>> -		     size_t bo_size, unsigned int flags, int num_dwords)
>> +		     size_t bo_size, unsigned int flags, int num_dwords, bool bind)
>
>You have flags field but added a bool for bind? Confusing.
This is an older patch BIND flags was not part of it, this is changed in the latest patch
>Again I think you should build prefetch tests within existing tests (the test_exec
>function).

Idea was to not club prefetch tests with the existing test_exec to make them future proof for any debug purpose,  However if you
think otherwise this can be moved under test_exec. 

-----
Gowtham
>
>Matt
>
>>  {
>>  	struct batch_data *data;
>>  	uint64_t target_addr;
>> @@ -542,6 +560,13 @@ static void prefetch(int fd, struct
>drm_xe_engine_class_instance *eci,
>>  	sync[0].addr = to_user_pointer(exec_ufence);
>>  	xe_vm_prefetch_async(fd, vm, 0, 0, addr, bo_size, sync, 1, flags & VRAM ?
>1 : 0);
>>  	xe_wait_ufence(fd, exec_ufence, USER_FENCE_VALUE, 0,
>NSEC_PER_SEC);
>> +	if (bind) {
>> +		exec_ufence[0] = 0;
>> +		sync[0].addr = to_user_pointer(exec_ufence);
>> +		xe_vm_prefetch_async(fd, vm, 0, 0, addr, bo_size, sync, 1, flags &
>VRAM ? 0 : 1);
>> +		xe_wait_ufence(fd, exec_ufence, USER_FENCE_VALUE, 0,
>NSEC_PER_SEC);
>> +		exec_ufence[0] = 0;
>> +	}
>>  	exec.exec_queue_id = exec_queues;
>>
>>  	for (int i = 0; i < num_dwords; i++) { @@ -2045,16 +2070,28 @@
>> igt_main
>>
>>  	for (m = mode; m->name; m++) {
>>                  igt_subtest_f("prefetch-smem-%s", m->name)
>> -                        prefetch(fd, &engine->instance, m->size, 0, 1);
>> +                        prefetch(fd, &engine->instance, m->size, 0,
>> + 1, 0);
>>
>>                  igt_subtest_f("prefetch-vram-%s", m->name)
>> -                        prefetch(fd, &engine->instance, m->size, VRAM, 1);
>> +                        prefetch(fd, &engine->instance, m->size,
>> + VRAM, 1, 0);
>>
>>                  igt_subtest_f("multi-range-smem-%s", m->name)
>> -                        prefetch(fd, &engine->instance, m->size, 0, 10);
>> +                        prefetch(fd, &engine->instance, m->size, 0,
>> + 10, 0);
>>
>>                  igt_subtest_f("multi-range-vram-%s", m->name)
>> -                        prefetch(fd, &engine->instance, m->size, VRAM, 10);
>> +                        prefetch(fd, &engine->instance, m->size,
>> + VRAM, 10, 0);
>> +
>> +		igt_subtest_f("bind-vram-%s", m->name)
>> +			prefetch(fd, &engine->instance, m->size, 0, 1, 1);
>> +
>> +		igt_subtest_f("bind-smem-%s", m->name)
>> +			prefetch(fd, &engine->instance, m->size, VRAM, 1, 1);
>> +
>> +		igt_subtest_f("multi-range-bind-vram-%s", m->name)
>> +			prefetch(fd, &engine->instance, m->size, 0, 10, 1);
>> +
>> +		igt_subtest_f("multi-range-bind-smem-%s", m->name)
>> +			prefetch(fd, &engine->instance, m->size, VRAM, 10, 1);
>>          }
>>
>>  	igt_fixture {
>> --
>> 2.34.1
>>


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