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[AMD Official Use Only - General]<br>
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Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com><br>
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--</div>
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Regards,</div>
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Jay<br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Hersen Wu <hersenxs.wu@amd.com><br>
<b>Sent:</b> Monday, December 18, 2023 8:59 AM<br>
<b>To:</b> igt-dev@lists.freedesktop.org <igt-dev@lists.freedesktop.org>; Siqueira, Rodrigo <Rodrigo.Siqueira@amd.com>; Pillai, Aurabindo <Aurabindo.Pillai@amd.com>; Hung, Alex <Alex.Hung@amd.com>; Mahfooz, Hamza <Hamza.Mahfooz@amd.com>; Lin, Wayne <Wayne.Lin@amd.com><br>
<b>Cc:</b> markyacoub@google.com <markyacoub@google.com>; Wu, Hersen <hersenxs.wu@amd.com>; Wu, Hersen <hersenxs.wu@amd.com><br>
<b>Subject:</b> [PATCH] [i-g-t] tests/amdgpu/amd_link_settings: Fix run eDP link training with unsupported link rate</font>
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<div class="PlainText">From: Hersen Wu <Hersenxs.Wu@amd.com><br>
<br>
Add check eDP intermedidate link rate caps from DPCD<br>
offset 0x10 - 0x1f. Only run DP link training for link<br>
rate supported by eDP.<br>
<br>
Beside max link rate, eDP1.4b introduces intermediate link<br>
rate. eDP reports ilr caps with DPCD register 0x10 - 0x1f.<br>
<br>
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com><br>
---<br>
lib/igt_amd.h | 1 +<br>
tests/amdgpu/amd_ilr.c | 2 --<br>
tests/amdgpu/amd_link_settings.c | 32 ++++++++++++++++++++++++++++----<br>
3 files changed, 29 insertions(+), 6 deletions(-)<br>
<br>
diff --git a/lib/igt_amd.h b/lib/igt_amd.h<br>
index 1e66348ad..254b5d37b 100644<br>
--- a/lib/igt_amd.h<br>
+++ b/lib/igt_amd.h<br>
@@ -46,6 +46,7 @@<br>
/* eDP related */<br>
#define DEBUGFS_EDP_ILR_SETTING "ilr_setting"<br>
#define MAX_SUPPORTED_ILR 8<br>
+#define MULTIPLIER_TO_LR 270000<br>
#define DEBUGFS_EDP_PSR_CAP "psr_capability"<br>
#define DEBUGFS_EDP_PSR_STATE "psr_state"<br>
#define DEBUGFS_ALLOW_EDP_HOTPLUG_DETECT "allow_edp_hotplug_detection"<br>
diff --git a/tests/amdgpu/amd_ilr.c b/tests/amdgpu/amd_ilr.c<br>
index 50ca93a14..b2c0f294d 100644<br>
--- a/tests/amdgpu/amd_ilr.c<br>
+++ b/tests/amdgpu/amd_ilr.c<br>
@@ -29,8 +29,6 @@<br>
#include <sys/types.h><br>
#include <sys/stat.h><br>
<br>
-#define MULTIPLIER_TO_LR 270000<br>
-<br>
IGT_TEST_DESCRIPTION("This igt test validates ILR (Intermediate Link Rate) "<br>
"feature from two perspective: "<br>
"1. Test if we can sucessfully train link rate at all supported ILRs"<br>
diff --git a/tests/amdgpu/amd_link_settings.c b/tests/amdgpu/amd_link_settings.c<br>
index 6a7e8cc53..226c94d73 100644<br>
--- a/tests/amdgpu/amd_link_settings.c<br>
+++ b/tests/amdgpu/amd_link_settings.c<br>
@@ -34,6 +34,7 @@ typedef struct<br>
enum pipe pipe_id;<br>
int connector_type;<br>
int w, h;<br>
+ int supported_ilr[MAX_SUPPORTED_ILR];<br>
} data_t;<br>
<br>
const enum dc_lane_count lane_count_values[] =<br>
@@ -51,12 +52,17 @@ const enum dc_link_rate dp_link_rate_values[] =<br>
LINK_RATE_HIGH3<br>
};<br>
<br>
+/* eDP 1.4b */<br>
const enum dc_link_rate edp_link_rate_values[] =<br>
{<br>
- LINK_RATE_LOW,<br>
- LINK_RATE_HIGH,<br>
- LINK_RATE_RBR2,<br>
- LINK_RATE_HIGH2<br>
+ LINK_RATE_LOW, /* 0x6 Rate_1 (RBR) - 1.62 Gbps/Lane */<br>
+ LINK_RATE_RATE_2, /* 0x8 Rate_2 - 2.16 Gbps/Lane */<br>
+ LINK_RATE_RATE_3, /* 0x9 Rate_3 - 2.43 Gbps/Lane */<br>
+ LINK_RATE_HIGH, /* 0xA Rate_4 (HBR) - 2.70 Gbps/Lane */<br>
+ LINK_RATE_RBR2, /* 0xC Rate_5 (RBR2) - 3.24 Gbps/Lane */<br>
+ LINK_RATE_RATE_6, /* 0x10 Rate_6 - 4.32 Gbps/Lane */<br>
+ LINK_RATE_HIGH2, /* 0x14 Rate_7 (HBR2) - 5.40 Gbps/Lane */<br>
+ LINK_RATE_HIGH3 /* 0x1E Rate_8 (HBR3) - 8.10 Gbps/Lane */<br>
};<br>
<br>
static void test_fini(data_t *data)<br>
@@ -116,6 +122,8 @@ static void run_link_training_config(data_t *data, igt_output_t *output)<br>
} else if (data->connector_type == DRM_MODE_CONNECTOR_eDP) {<br>
link_rate_values = edp_link_rate_values;<br>
num_link_rates = ARRAY_SIZE(edp_link_rate_values);<br>
+ igt_amd_read_ilr_setting(data->drm_fd, connector_name,<br>
+ data->supported_ilr);<br>
} else {<br>
igt_info("Not a DP or eDP connector\n");<br>
return;<br>
@@ -137,6 +145,22 @@ static void run_link_training_config(data_t *data, igt_output_t *output)<br>
if (link_rate_values[j] > max_lr)<br>
continue;<br>
<br>
+ /* Check if ilr link rate is supported */<br>
+ if (data->connector_type == DRM_MODE_CONNECTOR_eDP) {<br>
+ bool valid_link_rate = false;<br>
+<br>
+ for (int k = 0; k < MAX_SUPPORTED_ILR; k++) {<br>
+ if (data->supported_ilr[k] ==<br>
+ link_rate_values[j] * MULTIPLIER_TO_LR) {<br>
+ valid_link_rate = true;<br>
+ break;<br>
+ } else if (data->supported_ilr[k] == 0)<br>
+ break;<br>
+ }<br>
+ if (!valid_link_rate)<br>
+ continue;<br>
+ }<br>
+<br>
/* Write link settings */<br>
igt_info("Applying lane count: %d, link rate 0x%02x, on default training\n",<br>
lane_count_values[i], link_rate_values[j]);<br>
-- <br>
2.25.1<br>
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