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[AMD Official Use Only - General]<br>
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Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com><br>
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--</div>
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Regards,</div>
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Jay<br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Hersen Wu <hersenxs.wu@amd.com><br>
<b>Sent:</b> Wednesday, January 31, 2024 2:43 PM<br>
<b>To:</b> igt-dev@lists.freedesktop.org <igt-dev@lists.freedesktop.org>; Siqueira, Rodrigo <Rodrigo.Siqueira@amd.com>; Pillai, Aurabindo <Aurabindo.Pillai@amd.com>; Hung, Alex <Alex.Hung@amd.com>; Mahfooz, Hamza <Hamza.Mahfooz@amd.com>; Lin, Wayne <Wayne.Lin@amd.com><br>
<b>Cc:</b> markyacoub@google.com <markyacoub@google.com>; Wu, Hersen <hersenxs.wu@amd.com><br>
<b>Subject:</b> [PATCH] [i-g-t] tests/amdgpu/amd_ilr: Fix psr eDP crc read timeout</font>
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<div class="PlainText">Disable eDP psr via debugfs disallow_edp_enter_psr<br>
before IGT reads crc.<br>
<br>
With set_all_output_pipe_to_none within test_init,<br>
Tx writes dpcd 0x600=2. eDP rx is power down.<br>
Rx dpcd 0x170 is reset to 0 by Rx. eDP psr and crc<br>
check for rx internal logic are disabled. With<br>
disallow_edP_enter_psr = true, IGT sets test patterns,<br>
then igt_display_commit_atomic, kernel driver will<br>
turn on edp. Rx FW set dpcd 0x170 = 0 (default value).<br>
Therefore, IGT could read rx crc successfully.<br>
<br>
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com><br>
---<br>
tests/amdgpu/amd_ilr.c | 14 ++++++++++++++<br>
1 file changed, 14 insertions(+)<br>
<br>
diff --git a/tests/amdgpu/amd_ilr.c b/tests/amdgpu/amd_ilr.c<br>
index b2c0f294d..46ad6f60a 100644<br>
--- a/tests/amdgpu/amd_ilr.c<br>
+++ b/tests/amdgpu/amd_ilr.c<br>
@@ -205,11 +205,22 @@ static void test_flow(data_t *data, enum sub_test option)<br>
continue;<br>
}<br>
<br>
+ /* igt_amd_output_has_ilr_setting only checks if debugfs<br>
+ * exist. ilr settings could be all 0s -- not supported.<br>
+ * IGT needs to check if ilr settings values are supported.<br>
+ */<br>
+ igt_amd_read_ilr_setting(data->drm_fd, output->name, data->supported_ilr);<br>
+ if (data->supported_ilr[0] == 0)<br>
+ continue;<br>
+<br>
igt_info("Testing on output: %s\n", output->name);<br>
<br>
/* Init only if display supports ilr link settings */<br>
test_init(data, output);<br>
<br>
+ /* Disable eDP PSR to avoid timeout when reading CRC */<br>
+ igt_amd_disallow_edp_enter_psr(data->drm_fd, output->name, true);<br>
+<br>
mode = igt_output_get_mode(output);<br>
igt_assert(mode);<br>
<br>
@@ -243,6 +254,9 @@ static void test_flow(data_t *data, enum sub_test option)<br>
igt_remove_fb(data->drm_fd, &data->fb);<br>
<br>
test_fini(data);<br>
+<br>
+ /* Enable eDP PSR */<br>
+ igt_amd_disallow_edp_enter_psr(data->drm_fd, output->name, false);<br>
}<br>
<br>
}<br>
-- <br>
2.25.1<br>
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