<!DOCTYPE html><html><head> <meta http-equiv="Content-Type" content="text/html; charset=utf-8"> </head> <body> Thanks for catching this. Please add the following comment: "For example, the <code>ioctl amdgpu_query_hw_ip_info</code> could fail if certain IP instance types are not present in the ASIC." Also, to avoid compiler compliance issues with zero initialization, please add <code>memset(&</code>hw_ip_info<code>, 0, sizeof(</code>hw_ip_info<code>));</code> With this fixed, it is reviewed by Vitaly Prosyak <a rel="noopener">vitaly.prosyak@amd.com</a>. Thanks, Vitaly <div class="moz-cite-prefix">On 2024-08-21 07:02, <a class="moz-txt-link-abbreviated" href="mailto:Trigger.Huang@amd.com">Trigger.Huang@amd.com</a> wrote: </div> <blockquote type="cite" cite="mid:20240821110232.2559-1-Trigger.Huang@amd.com"> <pre class="moz-quote-pre" wrap="">From: Trigger Huang <a class="moz-txt-link-rfc2396E" href="mailto:Trigger.Huang@amd.com"><Trigger.Huang@amd.com></a> When family_id is AMDGPU_FAMILY_RV, we further check if it is Renoir by chip_external_rev. When checking if a command ring is available on a specific AMD GPU in is_rings_available(), delete the igt_assert_eq(). Because it is normal that not all the rings are available on all ASIC families. For example, there is no AMD_IP_VPE on Renior Signed-off-by: Trigger Huang <a class="moz-txt-link-rfc2396E" href="mailto:Trigger.Huang@amd.com"><Trigger.Huang@amd.com></a> --- lib/amdgpu/amd_ip_blocks.c | 4 +--- tests/amdgpu/amd_deadlock.c | 4 +++- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/lib/amdgpu/amd_ip_blocks.c b/lib/amdgpu/amd_ip_blocks.c index 3cd9ce7d2..c880a2926 100644 --- a/lib/amdgpu/amd_ip_blocks.c +++ b/lib/amdgpu/amd_ip_blocks.c @@ -902,10 +902,8 @@ is_rings_available(amdgpu_device_handle device_handle, uint32_t mask, enum amd_ip_block_type type) { struct drm_amdgpu_info_hw_ip hw_ip_info = {0}; - int r; - r = amdgpu_query_hw_ip_info(device_handle, type, 0, &hw_ip_info); - igt_assert_eq(r, 0); + amdgpu_query_hw_ip_info(device_handle, type, 0, &hw_ip_info); return hw_ip_info.available_rings & mask; } diff --git a/tests/amdgpu/amd_deadlock.c b/tests/amdgpu/amd_deadlock.c index 52ba08494..96da49002 100644 --- a/tests/amdgpu/amd_deadlock.c +++ b/tests/amdgpu/amd_deadlock.c @@ -8,6 +8,7 @@ #include "lib/amdgpu/amd_memory.h" #include "lib/amdgpu/amd_command_submission.h" #include "lib/amdgpu/amd_deadlock_helpers.h" +#include "lib/amdgpu/amdgpu_asic_addr.h" #define AMDGPU_FAMILY_SI 110 /* Hainan, Oland, Verde, Pitcairn, Tahiti */ #define AMDGPU_FAMILY_CI 120 /* Bonaire, Hawaii */ @@ -24,7 +25,8 @@ is_deadlock_tests_enable(const struct amdgpu_gpu_info *gpu_info) if (gpu_info->family_id == AMDGPU_FAMILY_SI || gpu_info->family_id == AMDGPU_FAMILY_KV || gpu_info->family_id == AMDGPU_FAMILY_CZ || - gpu_info->family_id == AMDGPU_FAMILY_RV) { + ((gpu_info->family_id == AMDGPU_FAMILY_RV) && + (!ASICREV_IS_RENOIR(gpu_info->chip_external_rev)))) { igt_info("\n\nGPU reset is not enabled for the ASIC, deadlock test skip\n"); enable = false; } </pre> </blockquote> </body> </html>