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<div class="moz-cite-prefix">On 18-03-2025 20:31, Jakub Kolakowski
wrote:<br>
</div>
<blockquote type="cite" cite="mid:20250318150108.1055169-3-jakub1.kolakowski@intel.com">
<pre wrap="" class="moz-quote-pre">Add a check for power management capability of device tested in tests
related to D3 states. Currently if test is started on configuration
that does not support the PM capability it doesn't skip, instead
depending on test it may fail, abort or timeout.
With this change test will skip with a clear message why it did.
Cc: Adam Miszczak <a class="moz-txt-link-rfc2396E" href="mailto:adam.miszczak@linux.intel.com"><adam.miszczak@linux.intel.com></a>
Cc: Lukasz Laguna <a class="moz-txt-link-rfc2396E" href="mailto:lukasz.laguna@intel.com"><lukasz.laguna@intel.com></a>
Cc: Marcin Bernatowicz <a class="moz-txt-link-rfc2396E" href="mailto:marcin.bernatowicz@linux.intel.com"><marcin.bernatowicz@linux.intel.com></a>
Signed-off-by: Jakub Kolakowski <a class="moz-txt-link-rfc2396E" href="mailto:jakub1.kolakowski@intel.com"><jakub1.kolakowski@intel.com></a>
---
tests/intel/xe_pm.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tests/intel/xe_pm.c b/tests/intel/xe_pm.c
index c2026474d..70f0613fb 100644
--- a/tests/intel/xe_pm.c
+++ b/tests/intel/xe_pm.c
@@ -146,6 +146,9 @@ static void vram_d3cold_threshold_restore(int sig)
static bool setup_d3(device_t device, enum igt_acpi_d_state state)
{
+ igt_require_f(igt_has_pci_pm_capability(device.pci_xe),
+ "PCI power management capability not found\n");</pre>
</blockquote>
<p style="margin:0in;font-family:"Intel Clear";font-size:10.0pt">Hi
Jakub,</p>
<p style="margin:0in;font-family:"Intel Clear";font-size:10.0pt"> </p>
<p style="margin:0in;font-family:"Intel Clear";font-size:10.0pt">As
per PCIe
Base spec, all PCI Express Functions are required to support PCI
Power
Management Capability.</p>
<p style="margin:0in;font-family:"Intel Clear";font-size:10.0pt">Only
legacy
PCI devices wouldn't have it.</p>
<p style="margin:0in;font-family:"Intel Clear";font-size:10.0pt">Can
you share
details of failures without this capability.</p>
<p style="margin:0in;font-family:"Intel Clear";font-size:10.0pt">All
Xe supported GPUs are PCIe complaint, this check may not be needed
at all.</p>
<p style="margin:0in;font-family:"Intel Clear";font-size:10.0pt"><br>
</p>
<blockquote type="cite" cite="mid:20250318150108.1055169-3-jakub1.kolakowski@intel.com">
<pre wrap="" class="moz-quote-pre">
+
dpms_on_off(device, DRM_MODE_DPMS_OFF);
/*
</pre>
</blockquote>
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