[Bug 81154] New: [BDW Bisected]Piglit spec_ARB_ES2_compatibility_FBO_blit_from_missing_attachment_(ES2_completeness_rules) fails

Thu Jul 10 01:02:30 PDT 2014

https://bugs.freedesktop.org/show_bug.cgi?id=81154

          Priority: high
            Bug ID: 81154
          Assignee: idr at freedesktop.org
           Summary: [BDW Bisected]Piglit
                    spec_ARB_ES2_compatibility_FBO_blit_from_missing_attac
                    hment_(ES2_completeness_rules) fails
        QA Contact: intel-3d-bugs at lists.freedesktop.org
          Severity: major
    Classification: Unclassified
                OS: Linux (All)
          Reporter: huax.lu at intel.com
          Hardware: All
            Status: NEW
           Version: unspecified
         Component: Drivers/DRI/i965
           Product: Mesa

System Environment:
--------------------------
Platform: Broadwell
Libdrm:       
(master)libdrm-2.4.54-17-ge8c3c1358ecaf4e90f7d43762357ae6f8e2022b6
Mesa:        (master)50bbe49c330095ba451d0f48c56759d148a609c2
Xserver:   
(master)xorg-server-1.15.99.902-121-g2f5cf9ff9a0f713b7e038636484c77f113a5f10a
Xf86_video_intel:(master)2.99.912-227-g8587b2fff218537c6ff568ac3ef561f0d39f03ff
Libva:        (master)c61d8c6ce9ffc27320e9e177c1e1123d5f1b5014
Libva_intel_driver:(master)c5cb17ea86f0065a939d3636dd26651c93d497c8
Kernel: drm-intel-nightly/ed4d04defe2c6962efe8f4ba3587a8e69e06d2dd

Bug detailed description:
------------------------- 
It fails on Broadwell with mesa master branch, works well on 10.2 branch.
Following cases also fail with same bisect commit.
spec_ARB_ES2_compatibility_FBO_blit_to_missing_attachment_(ES2_completeness_rules)
spec_ARB_framebuffer_object_FBO_blit_from_missing_attachment
spec_ARB_framebuffer_object_framebuffer-blit-levels_draw_depth
spec_ARB_framebuffer_object_framebuffer-blit-levels_read_depth
spec_EXT_framebuffer_multisample_unaligned-blit_2_depth_downsample
spec_EXT_framebuffer_multisample_unaligned-blit_2_depth_upsample
spec_EXT_framebuffer_multisample_unaligned-blit_4_depth_downsample
spec_EXT_framebuffer_multisample_unaligned-blit_4_depth_upsample
spec_EXT_framebuffer_multisample_unaligned-blit_6_depth_downsample
spec_EXT_framebuffer_multisample_unaligned-blit_6_depth_upsample
spec_EXT_framebuffer_multisample_unaligned-blit_8_depth_downsample
spec_EXT_framebuffer_multisample_unaligned-blit_8_depth_upsample
spec_EXT_framebuffer_multisample_upsample_2_depth
spec_EXT_framebuffer_multisample_upsample_4_depth
spec_EXT_framebuffer_multisample_upsample_6_depth
spec_EXT_framebuffer_multisample_upsample_8_depth
spec_EXT_packed_depth_stencil_fbo-blit-d24s8

Bisect shows: bbefb15e01e1c16af69646898918982ae00f8c92 is the first bad commit
commit bbefb15e01e1c16af69646898918982ae00f8c92
Author:     Kristian HÃ¸gsberg <krh at bitplanet.net>
AuthorDate: Mon Jul 7 23:32:35 2014 -0700
Commit:     Kristian HÃ¸gsberg <krh at bitplanet.net>
CommitDate: Mon Jul 7 23:39:40 2014 -0700

    i965: Extend compute-to-mrf pass to understand blocks of MOVs

    The current compute-to-mrf pass doesn't handle blocks of MOVs.  Shaders
    that end with a texture fetch follwed by an fb write are left like this:

    0x00000000: pln(8)          g6<1>F          g4<0,1,0>F      g2<8,8,1>F     
{ align1 WE_normal 1Q compacted };
    0x00000008: pln(8)          g7<1>F          g4.4<0,1,0>F    g2<8,8,1>F     
{ align1 WE_normal 1Q compacted };
    0x00000010: send(8)         g2<1>UW         g6<8,8,1>F
                                sampler (1, 0, 0, 1) mlen 2 rlen 4             
{ align1 WE_normal 1Q };
    0x00000020: mov(8)          g113<1>F        g2<8,8,1>F                     
{ align1 WE_normal 1Q compacted };
    0x00000028: mov(8)          g114<1>F        g3<8,8,1>F                     
{ align1 WE_normal 1Q compacted };
    0x00000030: mov(8)          g115<1>F        g4<8,8,1>F                     
{ align1 WE_normal 1Q compacted };
    0x00000038: mov(8)          g116<1>F        g5<8,8,1>F                     
{ align1 WE_normal 1Q compacted };
    0x00000040: sendc(8)        null            g113<8,8,1>F
                                render ( RT write, 0, 4, 12) mlen 4 rlen 0     
{ align1 WE_normal 1Q EOT };

    This patch lets compute-to-mrf recognize blocks of MOVs and match them to
    instructions (typically SEND) that writes multiple registers.  With this,
    the above shader becomes:

    0x00000000: pln(8)          g6<1>F          g4<0,1,0>F      g2<8,8,1>F     
{ align1 WE_normal 1Q compacted };
    0x00000008: pln(8)          g7<1>F          g4.4<0,1,0>F    g2<8,8,1>F     
{ align1 WE_normal 1Q compacted };
    0x00000010: send(8)         g113<1>UW       g6<8,8,1>F
                                sampler (1, 0, 0, 1) mlen 2 rlen 4             
{ align1 WE_normal 1Q };
    0x00000020: sendc(8)        null            g113<8,8,1>F
                                render ( RT write, 0, 20, 12) mlen 4 rlen 0    
{ align1 WE_normal 1Q EOT };

    which is the bulk of the shader db results:

    total instructions in shared programs: 987040 -> 986720 (-0.03%)
    instructions in affected programs:     844 -> 524 (-37.91%)
    GAINED:                                0
    LOST:                                  0

    The optimization also applies to MRT shaders that write the same
    color value to multiple RTs, in which case we can eliminate four MOVs in
    a similar fashion.  See fbo-drawbuffers2-blend in piglit for an example.

    No measurable performance impact.  No piglit regressions.

    Signed-off-by: Kristian HÃ¸gsberg <krh at bitplanet.net>

output:
Testing blit from buffer with missing attachment to complete buffer...
Probe depth at (40,40)
  Expected: 0.750000
  Observed: 0.000000
Probe depth at (4,0)
  Expected: 0.000000
  Observed: 0.500000
PIGLIT: {"result": "fail" }

Reproduce steps:
-------------------------
1. xinit
2. bin/fbo-missing-attachment-blit es2 from -fbo -auto

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