[Bug 85505] i965/fs: Better heuristics on when to drop from SIMD16 to SIMD8, on register spilling

bugzilla-daemon at freedesktop.org bugzilla-daemon at freedesktop.org
Mon Nov 3 05:03:33 PST 2014


https://bugs.freedesktop.org/show_bug.cgi?id=85505

--- Comment #4 from Eero Tamminen <eero.t.tamminen at intel.com> ---
That was on HSW GT2.  On GT3e, it's the same, by forcing SIMD16 even with
register spilling, gives few percent better results with Volplosion and few
percent worse with ShMapVsm.

The difference between these tests is that Volplosion spills only a little
compared to the amount of instructions in it and it has no texture access, so
latency compensation from SIMD16 improves performance.  ShMapVsm spills more
and does shadow buffer accesses.

Good heuristics on how serious register spilling is, should take into account
how many instructions shader has vs. how much it needs to do large-latency
fetches for other things: spilled registers from scratch, pull parameters &
textures with sampler.

Because just color buffer & depth are larger than normal LLC, I think first
rule of thumb for these accesses could be using system memory fetch latency for
all of them and comparing that against number of instructions.  If the ratio is
good enough, there's no need to drop into SIMD8, even if that wouldn't have any
spilling.

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