[Bug 84104] Ring hang with geometry shaders on SNB

bugzilla-daemon at freedesktop.org bugzilla-daemon at freedesktop.org
Sun Sep 21 23:13:06 PDT 2014


https://bugs.freedesktop.org/show_bug.cgi?id=84104

--- Comment #3 from Iago Toral <itoral at igalia.com> ---
(In reply to comment #1)
> Our use of "Dual OWord Block" messages appears to be confusing the
> simulator; the second offset is not set to a proper value, so it usually
> ends up being out-of-range and tripping assertions.  We may want to use a
> different kind of message.

Right. For the record, the docs say that the hardware checks for out-of-range
writes and does not execute them.

> But, that doesn't appear to be the real problem.  Tentatively, it looks like
> the clipper is hitting an assertion about an unknown primitive topology
> exiting the GS.

mmm... that's interesting.

> On Gen6, it appears that we have to set the output topology in the GS URB
> Write message header.  I am not convinced that we're doing that correctly in
> all cases.  I noticed we zero out the input topology field in g0 right away
> - which should be fine, because we have the output topology as
> prog_data->output_topology.  We attempt to set that properly, but I'm not
> sure if we set it on every vertex - it looks like we may only set it on the
> first one.  Perhaps someone can sanity check this.

Sure, let me have a look and I'll update here.

> That said, I'm also seeing utterly bizarre values for topology in the
> simulator dump output - in the "primitive-id-restart
> GL_TRIANGLE_STRIP_ADJACENCY" test, it sure looks like we're getting
> 3DPRIM_QUADSTRIP going from the VS->GS, and again going from GS->CL (which
> is unsupported, and will trigger an assert).
>
> Maybe my analysis is wrong; I can't imagine how that could be.

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.freedesktop.org/archives/intel-3d-bugs/attachments/20140922/074918a2/attachment.html>


More information about the intel-3d-bugs mailing list