[Bug 89597] Implement SSBOs in GLSL front-end and i965

bugzilla-daemon at freedesktop.org bugzilla-daemon at freedesktop.org
Fri Apr 10 03:44:31 PDT 2015


https://bugs.freedesktop.org/show_bug.cgi?id=89597

--- Comment #8 from Iago Toral <itoral at igalia.com> ---
Kristian, I have a question concerting writes to row_major matrices:

Since we are using owrod block write messages, we always write 16 bytes and we
need to setup the writemask bits in the SEND's dst register to select the
channels we want effectively written.

When writing to a column in a row_major mat4 (i.e. mat[2] = ...) we will have
to emit 4 separate writes (since each component in that column falls into a
different OWORD offset in the buffer. Specifically, if we write all components
of mat[2] we want to write to dword offsets 2, 6, 10, 14, which translates to
writing the Y channel only in oword offsets 0, 1, 2, 3.

With a constant index, setting the writemask on the SEND's dst register to
select the Y channel is easy, because the offset is a constant expression and
we can simply do something like this in the visitor code:

unsigned const_offset = offset_ir->value.u[0];
int write_mask = 1 << (const_offset % 4);
struct brw_reg brw_dst = brw_set_writemask(dst, write_mask);

However, if we index into a row_major matrix with an non-constant expression,
then we can't do that. I imagine there is no way to set a register's writemask
dynamically from values stored in other registers, so in these cases I think we
will have to emit a read of the same dword offset we are going to write, then
overwrite the components we want to change, and finally write the entire oword
back to memory.

Am I missing a better way to do this?

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