[Bug 88521] GLBenchmark 2.7 TRex renders with artifacts on Gen8 with !UXA
bugzilla-daemon at freedesktop.org
bugzilla-daemon at freedesktop.org
Wed Apr 15 03:19:45 PDT 2015
https://bugs.freedesktop.org/show_bug.cgi?id=88521
Kenneth Graunke <kenneth at whitecape.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |ASSIGNED
Assignee|idr at freedesktop.org |kenneth at whitecape.org
--- Comment #14 from Kenneth Graunke <kenneth at whitecape.org> ---
Created attachment 115082
--> https://bugs.freedesktop.org/attachment.cgi?id=115082&action=edit
Fix the blitter code; fixes the bug.
When trying to figure out why synchronization mattered, I started playing
around with stalling vs. blitting in brw_buffer_subdata(). It turned out
stalling always worked, but blitting failed.
INTEL_DEBUG=sync means that the buffer is never busy, so we can simply map it
and edit the data, rather than having to do a stall-avoidance BLT.
Broadwell changed the blitter. Looking at the XY_SRC_COPY_BLT command, it now
requires that the source and destination addresses have to be cacheline
aligned. Our BufferSubData calls were performing linear blits with unaligned
addresses. I suspect the unaligned portion was just...not copied...leading to
entirely bunk vertex data.
Fixing this in intel_emit_linear_blit() is pretty easy. We can just use offset
% 64 as the X coordinate, and round the address down. This fixes the bug.
We almost certainly need to alter intelEmitCopyBlit() as well, as untiled
images will likely suffer from a similar bug. Maybe the other intel_blit.c
functions, too. Given that intelEmitCopyBlit() is allowed to fail, we can
always just do that when not cacheline aligned. We may also want to actually
adjust the parameters to make it work in some cases. Not sure.
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