[Bug 90520] Register spilling clobbers registers used elsewhere in the shader

bugzilla-daemon at freedesktop.org bugzilla-daemon at freedesktop.org
Wed May 20 04:28:52 PDT 2015


https://bugs.freedesktop.org/show_bug.cgi?id=90520

--- Comment #2 from Neil Roberts <neil at linux.intel.com> ---
Created attachment 115923
  --> https://bugs.freedesktop.org/attachment.cgi?id=115923&action=edit
INTEL_DEBUG=vs output

Note that the problem is with the vertex shader, not the fragment shader. Here
is the INTEL_DEBUG=vs output. You can see on line 1953 it is trying to write to
g127 in order to write it out to the URB on line 2150. However there are loads
of register spills in between that overwrite g127 so it ends up writing garbage
instead.

Note you can get this output on any platform like this:

INTEL_NO_HW=1 INTEL_DEVID_OVERRIDE=0x162e INTEL_DEBUG=vs
piglit/bin/varying-packing-simple float array -auto -fbo

It looks like the implied_mrf_writes method is used by
setup_mrf_hack_interference to make the MRF registers interfere with the
corresponding GRF registers. However I don't think this is enough because there
are no registers allocated for the message in SHADER_OPCODE_GEN4_SCRATCH_WRITE
so there is nothing to check against for a collision.

I think for the other opcodes this works differently because for example the
sampler instructions have the message registers as a source for the instruction
so the allocator will know these registers are being used. However for the
scratch write instruction the source is just an arbitrary register which gets
implicitly copied into g127 behind the scenes.

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.freedesktop.org/archives/intel-3d-bugs/attachments/20150520/eafb7323/attachment.html>


More information about the intel-3d-bugs mailing list