[Bug 92760] Add FP64 support to the i965 shader backends

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=92760

--- Comment #56 from Samuel Iglesias <siglesias at igalia.com> ---
In our current implementation, the lowering passes for floor() and ceil() are
using trunc() to do part of the calculations. Previosly, we scalarized trunc()
implementation because of its use of nir_if instruction.

I scalarized both floor() and ceil() lowering passes under the hypothesis that
nir_bcsel only reads from one channel (like nir_if), because in both passes
there is at least one bcsel operation before calling trunc(). Now, the floor
and ceil tests pass for dvecN.

Is that assumption valid for nir_bcsel?

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