[Bug 93325] [HSW,BDW,SKL]ES31-CTS.explicit_uniform_location.uniform-loc-* 2 tests fail

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=93325

Tapani Pälli <lemody at gmail.com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
         Resolution|---                         |FIXED

--- Comment #7 from Tapani Pälli <lemody at gmail.com> ---
these 2 should be fixed now by separate patches:

ES31-CTS.explicit_uniform_location.uniform-loc-implicit-in-some-stages3
was fixed by

commit cf96bce0ca8b2d6b5d4641efea1f2feedc024957
Author: Tapani Pälli <tapani.palli at intel.com>
Date:   Thu Jan 14 14:10:59 2016 +0200

    glsl: mark explicit uniforms as explicit in other stages too

    If shader declares uniform explicit location in one stage but
    implicit in another, explicit location should be used. Patch marks
    implicit uniforms as explicit if they were explicit in previous stage.
    This makes sure that we don't treat them implicit later when assigning
    locations.

    Fixes following CTS test:
       ES31-CTS.explicit_uniform_location.uniform-loc-implicit-in-some-stages3

    v2: move check to cross_validate_globals (Timothy)

    Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
    Reviewed-by: Timothy Arceri <timothy.arceri at collabora.com>

--- 8< -----------------------------------------------

ES31-CTS.explicit_uniform_location.uniform-loc-types-samplers
was fixed by

commit 18c76551ee425b981efefc61f663a7781df17882
Author: Francisco Jerez <currojerez at riseup.net>
Date:   Sat Jan 2 19:02:09 2016 -0800

    i965/gen6-7: Implement stall and flushes required prior to switching
pipelines.

    Switching the current pipeline while it's not completely idle or the
    read and write caches aren't flushed can lead to corruption.  Fixes
    misrendering of at least the following Khronos CTS test:

     ES31-CTS.shader_image_load_store.basic-allTargets-store-fs

    The stall and flushes are no longer required on Gen8+.

    v2: Emit PIPE_CONTROL with non-zero post-sync op before the write
        cache flush on SNB due to hardware bug. (Ken)

    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93323
    Reviewed-by: Matt Turner <mattst88 at gmail.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

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