[Bug 94744] Merge similar if-statements
bugzilla-daemon at freedesktop.org
bugzilla-daemon at freedesktop.org
Tue Mar 29 18:55:27 UTC 2016
https://bugs.freedesktop.org/show_bug.cgi?id=94744
Bug ID: 94744
Summary: Merge similar if-statements
Product: Mesa
Version: git
Hardware: All
OS: All
Status: NEW
Severity: enhancement
Priority: medium
Component: glsl-compiler
Assignee: idr at freedesktop.org
Reporter: idr at freedesktop.org
QA Contact: intel-3d-bugs at lists.freedesktop.org
I recently encountered some generated NIR like:
vec1 ssa_0 = load_const (0x00000000 /* 0.000000 */)
...
/* succs: block_3 block_4 */
if ssa_122 {
block block_3:
/* preds: block_2 */
/* succs: block_5 */
} else {
block block_4:
/* preds: block_2 */
vec1 ssa_139 = fmul ssa_138, ssa_1
/* succs: block_5 */
}
block block_5:
/* preds: block_3 block_4 */
vec1 ssa_140 = phi block_3: ssa_0, block_4: ssa_139
vec1 ssa_141 = fadd ssa_17, ssa_140
/* succs: block_6 block_7 */
if ssa_122 {
block block_6:
/* preds: block_5 */
vec1 ssa_142 = fmul ssa_138, ssa_1
/* succs: block_8 */
} else {
block block_7:
/* preds: block_5 */
/* succs: block_8 */
}
block block_8:
/* preds: block_6 block_7 */
vec1 ssa_143 = phi block_6: ssa_142, block_7: ssa_0
The i965 backend generates the obvious, terrible code for this. There are two
levels of optimization that could occur on just the NIR. First, merge the two
if-statements.
/* succs: block_3 block_4 */
if ssa_122 {
block block_3:
/* preds: block_2 */
vec1 ssa_142 = fmul ssa_138, ssa_1
/* succs: block_5 */
} else {
block block_4:
/* preds: block_2 */
vec1 ssa_139 = fmul ssa_138, ssa_1
/* succs: block_5 */
}
block block_5:
/* preds: block_3 block_4 */
vec1 ssa_140 = phi block_3: ssa_0, block_4: ssa_139
vec1 ssa_143 = phi block_6: ssa_142, block_7: ssa_0
vec1 ssa_141 = fadd ssa_17, ssa_140
Second, notice that the calculations in both branches is the same, and pull it
out.
vec1 ssa_999 = fmul ssa_138, ssa_1
/* succs: block_3 block_4 */
if ssa_122 {
block block_3:
/* preds: block_2 */
/* succs: block_5 */
} else {
block block_4:
/* preds: block_2 */
/* succs: block_5 */
}
block block_5:
/* preds: block_3 block_4 */
vec1 ssa_140 = phi block_3: ssa_0, block_4: ssa_999
vec1 ssa_143 = phi block_6: ssa_999, block_7: ssa_0
vec1 ssa_141 = fadd ssa_17, ssa_140
Existing optimization passes should turn this into a pair of bcsel
instructions.
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