[Bug 103626] [SNB] ES3-CTS.functional.shaders.precision

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=103626

            Bug ID: 103626
           Summary: [SNB] ES3-CTS.functional.shaders.precision
           Product: Mesa
           Version: git
          Hardware: Other
                OS: All
            Status: NEW
          Severity: normal
          Priority: medium
         Component: Drivers/DRI/i965
          Assignee: jason at jlekstrand.net
          Reporter: mark.a.janes at intel.com
        QA Contact: intel-3d-bugs at lists.freedesktop.org

Regressions:
    ES3-CTS.functional.shaders.precision.int.highp_mul_fragment.snbm64
    ES3-CTS.functional.shaders.precision.int.mediump_mul_fragment.snbm64
    ES3-CTS.functional.shaders.precision.int.lowp_mul_fragment.snbm64
    ES3-CTS.functional.shaders.precision.uint.highp_mul_fragment.snbm64
    ES3-CTS.functional.shaders.precision.uint.mediump_mul_fragment.snbm64
    ES3-CTS.functional.shaders.precision.uint.lowp_mul_fragment.snbm64

src/intel/compiler/brw_fs.cpp:838: unsigned int fs_inst::size_read(int) const:
Assertion `!"MRF registers are not allowed as sources"' failed.

Bisected to:
18fde36ced4279f2577097a1a7d31b55f2f5f141
Author:     Jason Ekstrand <jason at jlekstrand.net>

intel/fs: Use the original destination region for int MUL lowering

Some hardware (CHV, BXT) have special restrictions on register regions
when doing integer multiplication.  We want to respect those when we
lower to DxW multiplication.

Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>
Cc: mesa-stable at lists.freedesktop.org

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