[Bug 111405] Some infinite 'do{}while' loops lead mesa to an infinite compilation

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=111405

--- Comment #4 from andrii simiklit <andrey.simiklit.1989 at gmail.com> ---
Well, looks like I found a root cause.
There is an infinite loop of the following optimizations:
nir_opt_if->nir_opt_constant_folding->nir_opt_if->nir_opt_constant_folding->... 

For instance the original loop is:
>vec1 32 ssa_1 = load_const (0x40000000 /* 2.000000 */)
>vec1 32 ssa_2 = load_const (0x41200000 /* 10.000000 */)
>...
>loop {
>   vec1 32 ssa_10 = phi block_2: ssa_1, block_3: ssa_12
>   vec1 32 ssa_12 = fmul ssa_10, ssa_2
>}

nir_opt_if optimizes first loop iteration extracting fmul out of the loop:
>vec1 32 ssa_0 = load_const (0x40000000 /* 2.000000 */)
>vec1 32 ssa_1 = load_const (0x41200000 /* 10.000000 */)
>...
>vec1 32 ssa_6 = fmul ssa_0, ssa_1
>loop {
>   vec1 32 ssa_8 = phi block_1: ssa_6, block_2: ssa_10
>   vec1 32 ssa_10 = fmul ssa_8, ssa_1
>}

then nir_opt_constant_folding replaces fmul by constant value:
>vec1 32 ssa_0 = load_const (0x40000000 /* 2.000000 */)
>vec1 32 ssa_1 = load_const (0x41200000 /* 10.000000 */)
>...
>vec1 32 ssa_16 = load_const (0x41a00000 /* 20.000000 */)
>loop {
>    vec1 32 ssa_8 = phi block_1: ssa_16, block_2: ssa_10
>    vec1 32 ssa_10 = fmul ssa_8, ssa_1
>}

and nir_opt_if does it again extracts fmul out of the loop:
>vec1 32 ssa_0 = load_const (0x40000000 /* 2.000000 */)
>vec1 32 ssa_1 = load_const (0x41200000 /* 10.000000 */)
>...
>vec1 32 ssa_16 = load_const (0x41a00000 /* 20.000000 */)
>vec1 32 ssa_17 = fmul ssa_16, ssa_1
>loop {
>    vec1 32 ssa_19 = phi block_1: ssa_17, block_2: ssa_18
>    vec1 32 ssa_18 = fmul ssa_19, ssa_1
>}
again nir_opt_constant_folding replaces fmul by the constant
....

The simple solution is to disallow `opt_split_alu_of_phi` for infinity loops
but I can't say for sure that it is the best one at least for now. So I am
investigating nir_opt_if

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